Hello and welcome to the new Cadence community site, and my first blog post. You will see me here from time to time posting on topics and trends in the Power Efficient Design and Low Power Design area -- and most importantly, how we as a community can play a bigger part in ensuring your success. If you have any topics you would like to see me cover, please feel free to leave a comment or send me a private message.
For my first post, and keeping with the theme of working as a community to help ensure success, I wanted to highlight a recently produced online guidebook published by the Power Forward Initiative (PFI) that highlights user experiences in Low-Power Design -- "A Practical Guide to Low-Power Design" (available at http://www.powerforward.org/lp_guide/).
Our team recently sat down with Dr. Chi-Ping Hsu, Cadence Corporate Vice President, Chief Strategist, Product and Technology, to learn more. Dr. Chi-Ping Hsu is the originator and leader of the Power Forward Initiative. What is the low power guide?
Who will benefit most from the guide?
Dr. Chi-Ping: This is a must read for any design team who is beginning to adopt advanced power management design techniques.
How can the low power guide help chip designers?
Why did the Power Forward Initiative develop this guide?
How does the low power guide relate to the Common Power Format and the Low Power design?
How can designers get a copy of the low power guide?
What are the future plans for CPF?
Nice post, Neil! It is great to hear directly from Chi-Ping in this forum.