Twenty-four is a big number when it comes to the number of one-hour webinars planned for a single two-month period. Yet that's what Cadence is planning in a new series of Silicon Realization webinars, slated to begin Oct. 20 and run through Dec. 10.
Over the past several months Cadence has offered a number of free webinars, many in co-operation with partners such as GLOBALFOUNDRIES, Imperas, and ARM. It's a great way to reach EDA users with targeted technical information, and nobody has to travel. I have attended, and blogged, about five of those previous webinars (see list at end of this post). All were of high quality with good, practical, technical information.
Quick reminder: Silicon Realization, as described in the EDA360 vision paper, includes everything it takes to get a complex design into silicon, including design, verification, and implementation. What sets it apart from "EDA" as we have so far known it is that Silicon Realization offers a deterministic, integrated flow with unified design intent, mixed abstraction levels, and design convergence.
Here's the list of topics for the upcoming webinars. All take place at 10:00 am Pacific time. You will find abstracts for each, and registration information, here. The webinars will be archived for later viewing, but you can only ask questions if you tune into the live event.
Previous Industry Insights blogs about Cadence webinars:
Why Virtual Platforms Need Advanced Verification
Webinar: Some Practical Advice on Adopting ESL
3D-IC TSV Update: No Technology Roadblocks, But Cost Management is Needed
ARM, Cadence Webinar: How SOI Impacts Timing and Signal Integrity
OCV Webinar: Statistical Timing Finds a Niche