Cadence is hosting a Front End Design Summit on Thursday, December 6, 2012 9:30am – 5:00pm at Cadence San Jose headquarters, 2655 Seely Avenue, Building 10. Logic designers will hear from customers including Cisco, Chelsio, PMC, Spansion, and Via Technologies about strategies they employed to overcome challenges in synthesis, verification, and test deployment. Attendees will also learn about product updates and roadmaps from Cadence R&D experts from the Encounter RTL Compiler, Encounter Test, and Conformal product teams. The day will end with a networking reception.
Space is limited and registration is now open. Click here to register. Hope to see you at the event!