Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he put it: "I doubt if the EDA Designline, or in fact any Designline in the history of EE Times has ever had anything close to the concentration of design articles, opinions, book excerpts that I will be putting up this month - and all of them will be on the subject of power." And I agree.
Contributions have come predominantly from EDA, and from pretty much all the players with any kind of power analysis, verification or optimization offering. There's good stuff from a lot of different companies, but since this is a Cadence blog, I make no apologies for highlighting the Cadence content here.
Thanks Brian,You can bank on our continued help!
Thanks Pete. I appreciate that and it is nice to know that the effort that went into it is appreciated. I do plan to turn this into a easily navigable repository now that the first run of everything has been completed. I know that Cadence will help me in filling holes where they exist to make this a central repository that people will go to for the most up to date information about power.