I am using 16.3.In my design I created many netclass like POWER,CLOCK,DDR data,DDR add, Then I moved the corresponding nets to that class.After that I assigned the netclass to netclass and its working fine untill I am importing the new netlist. After Importing the netlist all the nets are removed from the netclass and its taking as default. I am not changing any net names.
I checked many time while importing only these problem happening. Plz help me
Did you make sure that "Import Changes Only" was checked in the Import Logic form (File > Import > Logic) ? Maybe it was set to "Overwrite Current Constraints".
I have seen Bus Names that I created in Constraint Manager get removed when importing a new netlist, even with "Import Changes Only" was checked, but never had it happen to Net Class.
Hope this helps,Mike CatrambonePlexus Engineering Solutions
In reply to oldmouldy:
Thanks for your reply. I found the problem. In SCH some of the nets already definied the spacing and physical property. same net In allegro also definied property. So there is a miss match between SCH and allegro property. I cleared all the property in SCH and imported. Now working fine. Thanks a lot for your support.