Hey all, my librarian and I are trying to come up with an elegant solution to some library managment issues.
In our company, we have corporate part libraries that are grouped by what I will call component type. For example, all of the resistors live in a library called RE, all of the caps live in a library called CA and so forth. Part of the designation comes from the way the parts are managed in our Oracle database. As our library grows, some of the individual libraries are getting pretty unweildly and I would like your opinion on how to clean them up.
What we try to do is keep the total number of cells in a library to a minimum and then use part table files to make final part selection. For example, in our RE library, we have a single cell called r_res. When you click on this cell the part table file loads up where the designer can then sort by value, pack_type, etc. Works great.
Where we are having a problem is with cells that have some "oddball" parts. Take for example our QD library. In that library, we store all of our transistors, diodes, etc. What would be ideal would be to have a single cell for all of our mosfets for example. On the top level, a fet is a 3 terminal device. It has a gate, a source, and a drain.Unfortunately, some manufacturers make a fet in a 8 pin package where the drain goes out to 4 pins, the gate to 1 pin and the source to the rest. Is there a way to still use a single cell/schematic symbol for the fet, but have it linked up to multiple package types of different pin count?
Below is the component browser view of a fet that has a 3 pin symbol and a 3 pin physical package (first library view, then selected part view). Following those two pix are view of a fet that has a physical package that has 2 drain pins. What we had to do was create a fet symbol that had 2 drain pins. What we would like to do is use the same 3 pin fet symbol and have it be able to map to the other packages. Anyone know how to do this???
I don't know if this solves your problem. But we haver used it on some of our connectors in our library.
The way we solved it on, where to use sizable pin instead of static pins and different pack types. You will get an error, as I remember, but it worked then.
In your case, instead of D1 and D2, use D<SIZE 1..0>. Then expand it on those part that need it.
Have you looked at the PACK_SHORT property. I think this would give you the capability to short D1 and D2 together at the part. You could build this into the primitive for that particular package.
Have you looked at the PACK_SHORT property? I think this would give you the capability to short D1 and D2 together within that primitive defining that particular package.