Can any one let me know , During PNR at block level
1) why do we maintain one row space between core and the block boundary in all sides ?
2) why do we keep preffered layer routing blockages around the boundary(~2 um) ?
3) why do we keep metal fill routing blockages around the boundary and also mention me the situations where we use metal fill blockages ?
Thanks & regards ,
These things aren't necessarily required, but are good design practice. It's nice to keep std cells away from the edges of the block to help block pin access and avoid DRCs at the next level up. For #2, I believe you're talking about the routing halo. This is to avoid SI issues between block and top-level. For #3, I have not done this before, so I'm not sure. Usually, when doing metal fill at the block level and then assembling the whole design, you might get density violations around block boundaries, just depending where the check boxes line up. Maybe the method you mention is to avoid metal fill spacing violations between block and top.