i need to use specman clock for the simulation in standalone mode instead of DUT clock. I read about si_util_time_mgr in a cadence newsletter.
But it is not working. Is it possible to get a specman clock to handle the timing in the verification environment? Please help on this
To make an e event tick like a clock, you can do the following (when Specman isn't attached to an RTL simulation):
event clock_rise is only @sys.any;
This replaces the more usual approach where the event is defined from an RTL signal:
event clock_rise is rise(tb_clk$) @sim;
Hope this helps.
In reply to StephenH:
Thank you for the response,
I tried as you mentioned, but the simulation/TCMs are not progressing but the time. Time is going infinity but there is no TCM invoked. This is the case when the TB clock is generated but not used.
If I dont generate TB clock, it is not at all progressing with sys.any and simulation is stopped.
It worked for me using sys.any event itself . I got it by not loading any design files.