Ross Weber from Unisys (user name weberrm) will be managing this forum as your Formal Analysis expert. Ross will be promoting forum discussions through posts on topical industry issues, as well as ensuring your questions are answered in a timely manner. Help Ross make this a useful forum by adding your insights and expertise. Ross Weber biography: Ross Weber is a Senior Hardware Engineer for Unisys Corporation where he has 8 years of experience in ASIC design and verification for Unisys’ Enterprise Server products. Ross has worked with many of the Cadence verification tools, as well as the application and core competency engineers at Cadence during his tenure. Ross has significant experience with using the Incisive Formal Verifier tool, and championing widespread adoption of Formal Analysis throughout Unisys.