did anybody know how to enter a random input data to perform a simulation using spectre (eg 1101...)
you can use rand_bit_stream from ahdlLib or vsource from analogLib. with vsource its not actually random, you can define the pattern arbitrarily.
Pattern parameters:45 data The bit string. A string that contains a series of the four states, 1 0 m z.46 rptstart=1 The starting bit when repeating. The data repeats from the specified bit to the end of the bit string. The parameter should be an integer from 1 to the length of the bit string.47 rpttimes=0 The repeat times. The output will maitain the state of the last bit after the last repeat. If its value is negative, the string repeats forever.
In reply to tkhan:
thank you all i appreciate
unfortunetly it doesnt't work with the version of spectre i have, it expect a 6.2 or later.
i think it's possible to write a module in Verilog -ams that's supports rhe generation of a sequence of bit, but how to include it ?
In reply to kamel:
In reply to Andrew Beckett:
i was talking about vsource i tried it and i got an error message according to the version of spectre that i m using.