Hai! I am going to use " tsmcN65nm " technology PDK kit .. and the cadence IC514 version of tool...
Now I have provided with " tsmcN45nm " schematics.. My job is to change all the schematics to refer to the 65nm tech..
I am able to do this task by means of my previous skill codes... In addiotion to this I would like to print a list (in a file/in CIW) of cells which
are having less values (w.l & m) compared to this new technology PDK kit..
Means I would like to know what is the minimum value that a particular transistor will have in each PDK kit..
I have both PDK kits...but our project will go on 65nm kit..
I hope someone will respond to my problem as early as possible........
Thanks in advance
Prabhakar. K -- Layout Engineer
With those PDKs you should be able to do:
(same for ~>minL) to get the minimum device size. These are properties in the "property bag" for the cell.
For an instance, you can do:
instId~>master~>cell~>minL (and minW).
Note these are returned as strings, so you might want to use cdfParseFloatString() to convert them into actual numbers.