Hi RRibeiroFor a chip of that size, I think perhaps it might be good to have a machine with the following configuration:ram >= 40Gcpu >= 12speed >= 2.9GHzYou might also want to consider upgrading to the latest version of Assura (412USR2_HF2)Best regardsQuek
at first, it would be helpful to have some more informations about the complexity of your design,what technology node are you dealing with, 2um or 32nm?What about hierarchy, do you have large arrays repeating the same structure?
And, the chipsize you are mentioning is very, very large, about 800mm2, this is more thantwice the size of a current AMD cpu; the size comes close to the limits of a whole stepping field;
is your design a power-device or an image-sensor or do you just work on a wholereticle-assembly consisting of more than one chip??
In reply to StefanSL:
RRibeiro, I frequently use Assura on reticle sized layouts. I have some questions:
1) What are the exact error messages that you are getting?
2) What version of Assura are you running and have you checked to see if it is compatible with your rule deck?
3) Have you tried using the avParameter "?diskList" ?
4) Have you checked to see if your 0.18u fab can build wafers consisting of reticle steps of that size (25.6mm x 32.6mm) ?
In reply to Zach:
Hi Zach, RRibeiro,
concerning the size of the design, it seems as if it's size is defined just to fit into the field size ofa DUV-scanner. Besides of that, some fabs do quite strange things to expose chips that aremuch larger than the field of their litho-equipment, keyword "stitching" for large area sensors.
Back to your hardware-requirements and optimization:
What are your current environment and settings?
On a design like your's, using hierarchical features of assura should strongly improveperformance.I assume you don't need the absolute highend, do you have access to other machinesjust for evaluation purposes before buying the wrong configuration?
What about a quad- or hex-core @ around 3GHz, 12..16GB RAM?