Problem: I had a schematic it has several sub cells. I am having netlist for all sub cells an Individual files for every cell .I want concatenate those files into single verilog file and also i want generate schematic for all cells from single verilog file. Could you please help on this.
I am using virtuoso 6.1.45
Is there a reason why you asked the same question again - I've already given answers in your other thread?
In reply to Andrew Beckett:
sorry andrew i am unable to open your suggested link could you please explain me
In reply to Myskill:
I thought that you might not be able to access the Cadence Online Support link, which is why I explained about setting vlogifCompatibilityMode = "4.0"