I have chosen a set up (which is attached) to get
accurate values of MOS' noise level. I am using UMC 65nm and took
resistance from Analoglib. I have disabled “Generate any noise”
option in resistor which is chosen and hence only MOS' noise is
EXPECTED. I need gate voltage PSD that is SVG and drain current noise
PSD that is SID. I am facing two problems here.
1> When I am changing values of resistor, SID PSD's
are getting scaled up/down. Why noise levels are getting changed when
resistor values are changed though “Generate any noise” option
is disabled. If this resistor still contributing any noise then how
can I measure or which kind of set up would be the better alternative
to get accurate MOS' noise PSDs?
2>How can I measure PSD of SVG in this case?
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