Q1. Can someone give the circuit for characterizing Transistors for gm/Id based design, as I found different circuits in differrent websites. Also what size of W should be taken when generating plots as I am using 180nm Technology.
Q2. I am able to plot fT vs gm/Id for single length after going to axis and changing "plot vs". But when I try to plot fT vs gm/Id for various L by using parametric analysis I am unable to get the fT vs gm/Id for various lengths. Is it possible or skill code is required.
Thanks in advance.
Ans1) - you can use a common source stage to use. To fix Vds , you should use opamp in negative feedback and one of the end of the opamp should ne the vds.
General thumb rules for plotting :-
1) W >> Wmin ( to start with 10 times say 10um for 5uA of dc current )
2) L= Lmin ( can start with that = 180nm )
Ans2) you must be able to plot with the method you described. You must have missed something.
Please share your experience , I am also very new to this method.