I'm working on the phisical verification using an Assura flow, there's two files: RSF_pre and T35FL.pre .. The first is the control file, and the other is the rules file.When running: >> assura RSF_pre and checking the output netlist, I noticed that all MOSFET transistors have thier Source and drain swapped!!! What is the possible reason that can cause such swapping??? BTW, where can I find documents about this topic? I have Cadence and Assura installed at my company.
Could any one help me please? Thanks in advance, Ahmad
Did you check the pins in the layout & symbol? Is the schematic hooked up correctly (symbols are not upside down or something)?