In reply to Andrew Beckett:
In reply to varunkumar:
That's not going to be so easy then. I had thought you might be able to do:
lceExtract(cvId) ; to use the Virtuoso Layout Suite XL extractordummies=setof(inst cvId~>instances firstNet=car(inst~>instTerms)~>net firstNet && forall(instTerm cdr(inst~>instTerms) instTerm~>net==firstNet))
But even that's not quite right. The problem is that lceExtract will probably not work in general if there's no schematic source, or on partly laid out designs.
Fundamentally you're going to have to extract the connections from the device and see whether the nets are all the same for all instTerms - something like that. If it had been done with layout XL, something like the above would be relatively straightforward (it would need some refinement to ensure that all the instTerms are actually present).
Without connectivity in the database, SKILL will have a hard time finding connections of the shapes/cells. You have to traverse the hierarchy and track the shapes on an instance by instance basis.
I would use the LVS commands in Diva, PVS or other LVS tools to trace the connections through the hierarchy. They can then place a marker on the dummy devices. Not only wll it be easier to code but will be much faster because the tracing is built in.