C:\Documents and Settings\fred\Desktop\sdc compare\pre.txt		C:\Documents and Settings\fred\Desktop\sdc compare\post.txt
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	# Created by write_sdc on Wed Apr 2 04:14:49 2008		# Created by write_sdc on Wed Apr 2 04:15:11 2008
	###################################################################		###################################################################
	set sdc_version 1.6		set sdc_version 1.6
	#set_operating_conditions worst -library smic18_ss		#set_operating_conditions worst -library smic18_ss
	#set_max_area 0		#set_max_area 0
	set_max_fanout 100 [current_design]		set_max_fanout 100 [current_design]
	set_max_transition 2 [current_design]		set_max_transition 2 [current_design]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[31]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[31]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[30]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[30]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[29]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[29]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[28]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[28]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[27]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[27]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[26]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[26]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[25]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[25]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[24]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[24]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[23]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[23]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[22]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[22]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[21]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[21]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[20]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[20]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[19]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[19]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[18]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[18]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[17]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[17]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[16]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[16]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[15]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[15]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[14]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[14]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[13]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[13]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[12]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[12]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[11]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[11]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[10]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[10]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[9]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[9]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[8]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[8]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[7]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[7]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[6]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[6]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[5]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[5]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[4]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[4]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[3]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[3]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[2]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[2]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[1]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[1]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[0]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m0_data_i[0]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_ack_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_ack_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_err_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_err_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_rty_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m0_rty_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[31]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[31]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[30]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[30]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[29]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[29]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[28]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[28]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[27]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[27]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[26]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[26]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[25]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[25]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[24]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[24]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[23]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[23]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[22]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[22]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[21]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[21]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[20]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[20]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[19]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[19]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[18]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[18]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[17]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[17]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[16]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[16]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[15]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[15]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[14]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[14]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[13]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[13]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[12]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[12]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[11]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[11]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[10]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[10]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[9]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[9]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[8]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[8]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[7]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[7]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[6]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[6]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[5]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[5]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[4]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[4]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[3]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[3]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[2]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[2]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[1]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[1]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[0]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {wb_m1_data_i[0]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_ack_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_ack_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_err_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_err_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_rty_i]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports wb_m1_rty_i]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[15]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[15]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[14]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[14]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[13]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[13]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[12]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[12]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[11]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[11]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[10]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[10]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[9]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[9]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[8]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[8]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[7]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[7]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[6]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[6]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[5]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[5]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[4]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[4]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[3]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[3]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[2]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[2]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[1]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[1]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[0]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_irqs[0]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tck]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tck]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tms]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tms]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tdi]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports jtag_tdi]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports cpu_clock]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports cpu_clock]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_clock_div[1]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_clock_div[1]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_clock_div[0]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {cpu_clock_div[0]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports ext_reset_n]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports ext_reset_n]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[7]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[7]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[6]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[6]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[5]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[5]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[4]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[4]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[3]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[3]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[2]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[2]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[1]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[1]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[0]}]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports {scan_test_si[0]}]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports scan_test_se]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports scan_test_se]
	set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports scan_test_mode]		set_driving_cell -lib_cell INVHD1X -library smic18_ss -no_design_rule [get_ports scan_test_mode]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[31]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[31]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[30]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[30]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[29]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[29]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[28]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[28]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[27]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[27]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[26]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[26]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[25]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[25]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[24]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[24]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[23]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[23]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[22]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[22]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[21]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[21]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[20]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[20]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[19]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[19]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[18]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[18]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[17]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[17]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[16]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[16]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[15]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[15]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[14]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[14]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[13]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[13]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[12]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[12]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[11]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[11]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[10]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[10]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[9]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[9]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[8]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[8]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[7]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[7]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[6]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[6]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[5]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[5]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[4]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[4]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_data_o[0]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[31]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[31]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[30]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[30]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[29]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[29]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[28]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[28]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[27]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[27]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[26]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[26]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[25]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[25]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[24]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[24]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[23]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[23]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[22]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[22]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[21]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[21]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[20]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[20]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[19]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[19]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[18]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[18]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[17]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[17]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[16]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[16]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[15]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[15]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[14]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[14]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[13]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[13]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[12]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[12]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[11]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[11]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[10]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[10]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[9]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[9]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[8]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[8]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[7]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[7]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[6]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[6]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[5]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[5]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[4]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[4]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_addr_o[0]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m0_sel_o[0]}]
	set_load -pin_load 0.0614561 [get_ports wb_m0_we_o]		set_load -pin_load 0.0614561 [get_ports wb_m0_we_o]
	set_load -pin_load 0.0614561 [get_ports wb_m0_cyc_o]		set_load -pin_load 0.0614561 [get_ports wb_m0_cyc_o]
	set_load -pin_load 0.0614561 [get_ports wb_m0_stb_o]		set_load -pin_load 0.0614561 [get_ports wb_m0_stb_o]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[31]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[31]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[30]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[30]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[29]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[29]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[28]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[28]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[27]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[27]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[26]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[26]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[25]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[25]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[24]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[24]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[23]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[23]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[22]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[22]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[21]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[21]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[20]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[20]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[19]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[19]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[18]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[18]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[17]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[17]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[16]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[16]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[15]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[15]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[14]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[14]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[13]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[13]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[12]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[12]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[11]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[11]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[10]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[10]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[9]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[9]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[8]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[8]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[7]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[7]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[6]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[6]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[5]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[5]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[4]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[4]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_data_o[0]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[31]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[31]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[30]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[30]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[29]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[29]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[28]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[28]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[27]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[27]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[26]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[26]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[25]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[25]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[24]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[24]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[23]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[23]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[22]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[22]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[21]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[21]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[20]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[20]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[19]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[19]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[18]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[18]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[17]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[17]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[16]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[16]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[15]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[15]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[14]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[14]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[13]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[13]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[12]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[12]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[11]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[11]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[10]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[10]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[9]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[9]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[8]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[8]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[7]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[7]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[6]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[6]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[5]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[5]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[4]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[4]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_addr_o[0]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[3]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[3]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[2]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[2]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[1]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[1]}]
	set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[0]}]		set_load -pin_load 0.0614561 [get_ports {wb_m1_sel_o[0]}]
	set_load -pin_load 0.0614561 [get_ports wb_m1_we_o]		set_load -pin_load 0.0614561 [get_ports wb_m1_we_o]
	set_load -pin_load 0.0614561 [get_ports wb_m1_cyc_o]		set_load -pin_load 0.0614561 [get_ports wb_m1_cyc_o]
	set_load -pin_load 0.0614561 [get_ports wb_m1_stb_o]		set_load -pin_load 0.0614561 [get_ports wb_m1_stb_o]
	set_load -pin_load 0.0614561 [get_ports jtag_tdo]		set_load -pin_load 0.0614561 [get_ports jtag_tdo]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[7]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[7]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[6]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[6]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[5]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[5]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[4]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[4]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[3]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[3]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[2]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[2]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[1]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[1]}]
	set_load -pin_load 0.0614561 [get_ports {scan_test_so[0]}]		set_load -pin_load 0.0614561 [get_ports {scan_test_so[0]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[31]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[31]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[30]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[30]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[29]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[29]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[28]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[28]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[27]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[27]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[26]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[26]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[25]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[25]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[24]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[24]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[23]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[23]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[22]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[22]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[21]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[21]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[20]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[20]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[19]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[19]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[18]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[18]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[17]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[17]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[16]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[16]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[15]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[15]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[14]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[14]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[13]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[13]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[12]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[12]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[11]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[11]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[10]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[10]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[9]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[9]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[8]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[8]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[7]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[7]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[6]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[6]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[5]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[5]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[4]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[4]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[3]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[3]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[2]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[2]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[1]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[1]}]
	set_max_fanout 1 [get_ports {wb_m0_data_i[0]}]		set_max_fanout 1 [get_ports {wb_m0_data_i[0]}]
	set_max_fanout 1 [get_ports wb_m0_ack_i]		set_max_fanout 1 [get_ports wb_m0_ack_i]
	set_max_fanout 1 [get_ports wb_m0_err_i]		set_max_fanout 1 [get_ports wb_m0_err_i]
	set_max_fanout 1 [get_ports wb_m0_rty_i]		set_max_fanout 1 [get_ports wb_m0_rty_i]
	set_max_fanout 1 [get_ports {wb_m1_data_i[31]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[31]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[30]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[30]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[29]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[29]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[28]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[28]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[27]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[27]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[26]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[26]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[25]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[25]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[24]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[24]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[23]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[23]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[22]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[22]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[21]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[21]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[20]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[20]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[19]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[19]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[18]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[18]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[17]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[17]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[16]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[16]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[15]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[15]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[14]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[14]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[13]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[13]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[12]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[12]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[11]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[11]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[10]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[10]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[9]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[9]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[8]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[8]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[7]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[7]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[6]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[6]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[5]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[5]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[4]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[4]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[3]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[3]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[2]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[2]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[1]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[1]}]
	set_max_fanout 1 [get_ports {wb_m1_data_i[0]}]		set_max_fanout 1 [get_ports {wb_m1_data_i[0]}]
	set_max_fanout 1 [get_ports wb_m1_ack_i]		set_max_fanout 1 [get_ports wb_m1_ack_i]
	set_max_fanout 1 [get_ports wb_m1_err_i]		set_max_fanout 1 [get_ports wb_m1_err_i]
	set_max_fanout 1 [get_ports wb_m1_rty_i]		set_max_fanout 1 [get_ports wb_m1_rty_i]
	set_max_fanout 1 [get_ports {cpu_irqs[15]}]		set_max_fanout 1 [get_ports {cpu_irqs[15]}]
	set_max_fanout 1 [get_ports {cpu_irqs[14]}]		set_max_fanout 1 [get_ports {cpu_irqs[14]}]
	set_max_fanout 1 [get_ports {cpu_irqs[13]}]		set_max_fanout 1 [get_ports {cpu_irqs[13]}]
	set_max_fanout 1 [get_ports {cpu_irqs[12]}]		set_max_fanout 1 [get_ports {cpu_irqs[12]}]
	set_max_fanout 1 [get_ports {cpu_irqs[11]}]		set_max_fanout 1 [get_ports {cpu_irqs[11]}]
	set_max_fanout 1 [get_ports {cpu_irqs[10]}]		set_max_fanout 1 [get_ports {cpu_irqs[10]}]
	set_max_fanout 1 [get_ports {cpu_irqs[9]}]		set_max_fanout 1 [get_ports {cpu_irqs[9]}]
	set_max_fanout 1 [get_ports {cpu_irqs[8]}]		set_max_fanout 1 [get_ports {cpu_irqs[8]}]
	set_max_fanout 1 [get_ports {cpu_irqs[7]}]		set_max_fanout 1 [get_ports {cpu_irqs[7]}]
	set_max_fanout 1 [get_ports {cpu_irqs[6]}]		set_max_fanout 1 [get_ports {cpu_irqs[6]}]
	set_max_fanout 1 [get_ports {cpu_irqs[5]}]		set_max_fanout 1 [get_ports {cpu_irqs[5]}]
	set_max_fanout 1 [get_ports {cpu_irqs[4]}]		set_max_fanout 1 [get_ports {cpu_irqs[4]}]
	set_max_fanout 1 [get_ports {cpu_irqs[3]}]		set_max_fanout 1 [get_ports {cpu_irqs[3]}]
	set_max_fanout 1 [get_ports {cpu_irqs[2]}]		set_max_fanout 1 [get_ports {cpu_irqs[2]}]
	set_max_fanout 1 [get_ports {cpu_irqs[1]}]		set_max_fanout 1 [get_ports {cpu_irqs[1]}]
	set_max_fanout 1 [get_ports {cpu_irqs[0]}]		set_max_fanout 1 [get_ports {cpu_irqs[0]}]
	set_max_fanout 1 [get_ports jtag_tck]		set_max_fanout 1 [get_ports jtag_tck]
	set_max_fanout 1 [get_ports jtag_tms]		set_max_fanout 1 [get_ports jtag_tms]
	set_max_fanout 1 [get_ports jtag_tdi]		set_max_fanout 1 [get_ports jtag_tdi]
	set_max_fanout 1 [get_ports cpu_clock]		set_max_fanout 1 [get_ports cpu_clock]
	set_max_fanout 1 [get_ports {cpu_clock_div[1]}]		set_max_fanout 1 [get_ports {cpu_clock_div[1]}]
	set_max_fanout 1 [get_ports {cpu_clock_div[0]}]		set_max_fanout 1 [get_ports {cpu_clock_div[0]}]
	set_max_fanout 1 [get_ports ext_reset_n]		set_max_fanout 1 [get_ports ext_reset_n]
	set_max_fanout 1 [get_ports {scan_test_si[7]}]		set_max_fanout 1 [get_ports {scan_test_si[7]}]
	set_max_fanout 1 [get_ports {scan_test_si[6]}]		set_max_fanout 1 [get_ports {scan_test_si[6]}]
	set_max_fanout 1 [get_ports {scan_test_si[5]}]		set_max_fanout 1 [get_ports {scan_test_si[5]}]
	set_max_fanout 1 [get_ports {scan_test_si[4]}]		set_max_fanout 1 [get_ports {scan_test_si[4]}]
	set_max_fanout 1 [get_ports {scan_test_si[3]}]		set_max_fanout 1 [get_ports {scan_test_si[3]}]
	set_max_fanout 1 [get_ports {scan_test_si[2]}]		set_max_fanout 1 [get_ports {scan_test_si[2]}]
	set_max_fanout 1 [get_ports {scan_test_si[1]}]		set_max_fanout 1 [get_ports {scan_test_si[1]}]
	set_max_fanout 1 [get_ports {scan_test_si[0]}]		set_max_fanout 1 [get_ports {scan_test_si[0]}]
	set_max_fanout 1 [get_ports scan_test_se]		set_max_fanout 1 [get_ports scan_test_se]
	set_max_fanout 1 [get_ports scan_test_mode]		set_max_fanout 1 [get_ports scan_test_mode]
	set_case_analysis 0 [get_ports {cpu_clock_div[1]}]		set_case_analysis 0 [get_ports {cpu_clock_div[1]}]
	set_case_analysis 1 [get_ports {cpu_clock_div[0]}]		set_case_analysis 1 [get_ports {cpu_clock_div[0]}]
	set_case_analysis 0 [get_ports scan_test_mode]		set_case_analysis 0 [get_ports scan_test_mode]
	create_generated_clock [get_pins clock_rst_gen_i/cpu_clock_div2_i/std_tff/Q]  -name wb_bus_clock_d2  -source [get_ports cpu_clock]  -divide_by 2		create_generated_clock [get_pins clock_rst_gen_i/cpu_clock_div2_i/std_tff/Q]  -name wb_bus_clock_d2  -source [get_ports cpu_clock]  -divide_by 2
	set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock_d2]		set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock_d2]
	set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock_d2]		set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock_d2]
	set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock_d2]		set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock_d2]
	set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock_d2]		set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock_d2]
	set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock_d2]		set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock_d2]
	set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock_d2]		set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock_d2]
	set_clock_transition -fall 0.8 [get_clocks wb_bus_clock_d2]		set_propagated_clock [get_clocks wb_bus_clock_d2]
	set_clock_transition -rise 0.8 [get_clocks wb_bus_clock_d2]
	create_generated_clock [get_pins clock_rst_gen_i/cpu_clock_div4_i/std_tff/Q]  -name wb_bus_clock_d4  -source [get_pins clock_rst_gen_i/cpu_clock_div2_i/std_tff/Q]  -divide_by 2		create_generated_clock [get_pins clock_rst_gen_i/cpu_clock_div4_i/std_tff/Q]  -name wb_bus_clock_d4  -source [get_pins clock_rst_gen_i/cpu_clock_div2_i/std_tff/Q]  -divide_by 2
	set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock_d4]		set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock_d4]
	set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock_d4]		set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock_d4]
	set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock_d4]		set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock_d4]
	set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock_d4]		set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock_d4]
	set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock_d4]		set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock_d4]
	set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock_d4]		set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock_d4]
	set_clock_transition -fall 0.8 [get_clocks wb_bus_clock_d4]		set_propagated_clock [get_clocks wb_bus_clock_d4]
	set_clock_transition -rise 0.8 [get_clocks wb_bus_clock_d4]
	create_clock -name wb_bus_clock  -period 16  -waveform {0 8}		create_clock -name wb_bus_clock  -period 16  -waveform {0 8}
			set_clock_latency 2  [get_clocks wb_bus_clock]
	set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock]		set_clock_uncertainty -setup 0.2  [get_clocks wb_bus_clock]
	set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock]		set_clock_uncertainty -hold 0.1  [get_clocks wb_bus_clock]
	set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock]		set_clock_gating_check -rise -setup 0.2 [get_clocks wb_bus_clock]
	set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock]		set_clock_gating_check -fall -setup 0.2 [get_clocks wb_bus_clock]
	set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock]		set_clock_gating_check -rise -hold 0.1 [get_clocks wb_bus_clock]
	set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock]		set_clock_gating_check -fall -hold 0.1 [get_clocks wb_bus_clock]
	create_clock [get_ports cpu_clock]  -name cpu_clock  -period 8  -waveform {0 4}  -add		create_clock [get_ports cpu_clock]  -name cpu_clock  -period 8  -waveform {0 4}  -add
	set_clock_uncertainty -setup 0.2  [get_clocks cpu_clock]		set_clock_uncertainty -setup 0.2  [get_clocks cpu_clock]
	set_clock_uncertainty -hold 0.1  [get_clocks cpu_clock]		set_clock_uncertainty -hold 0.1  [get_clocks cpu_clock]
	set_clock_transition -fall 0.8 [get_clocks cpu_clock]		set_propagated_clock [get_clocks cpu_clock]
	set_clock_transition -rise 0.8 [get_clocks cpu_clock]
	create_clock [get_ports jtag_tck]  -name jtag_clock  -period 20  -waveform {0 10}  -add		create_clock [get_ports jtag_tck]  -name jtag_clock  -period 20  -waveform {0 10}  -add
	set_clock_uncertainty -setup 0.2  [get_clocks jtag_clock]		set_clock_uncertainty -setup 0.2  [get_clocks jtag_clock]
	set_clock_uncertainty -hold 0.1  [get_clocks jtag_clock]		set_clock_uncertainty -hold 0.1  [get_clocks jtag_clock]
	set_clock_transition -fall 0.8 [get_clocks jtag_clock]		set_propagated_clock [get_clocks jtag_clock]
	set_clock_transition -rise 0.8 [get_clocks jtag_clock]		set_false_path   -from [get_clocks jtag_clock]  -to [get_clocks cpu_clock]
			set_false_path   -from [get_clocks cpu_clock]  -to [get_clocks jtag_clock]
			set_false_path   -from [get_clocks wb_bus_clock_d2]  -to [get_clocks jtag_clock]
			set_false_path   -from [get_clocks wb_bus_clock_d4]  -to [get_clocks jtag_clock]
	set_false_path   -from [get_clocks wb_bus_clock]  -to [get_clocks jtag_clock]		set_false_path   -from [get_clocks wb_bus_clock]  -to [get_clocks jtag_clock]
			set_false_path   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d2]
			set_false_path   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d4]
	set_false_path   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock]		set_false_path   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock]
	set_max_delay 20  -from [get_clocks cpu_clock]  -to [get_clocks jtag_clock]
	set_false_path -hold   -from [get_clocks cpu_clock]  -to [get_clocks jtag_clock]
	set_max_delay 8  -from [get_clocks jtag_clock]  -to [get_clocks cpu_clock]
	set_false_path -hold   -from [get_clocks jtag_clock]  -to [get_clocks cpu_clock]
	set_max_delay 20  -from [get_clocks wb_bus_clock_d2]  -to [get_clocks jtag_clock]
	set_false_path -hold   -from [get_clocks wb_bus_clock_d2]  -to [get_clocks jtag_clock]
	set_max_delay 16  -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d2]
	set_false_path -hold   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d2]
	set_max_delay 20  -from [get_clocks wb_bus_clock_d4]  -to [get_clocks jtag_clock]
	set_false_path -hold   -from [get_clocks wb_bus_clock_d4]  -to [get_clocks jtag_clock]
	set_max_delay 32  -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d4]
	set_false_path -hold   -from [get_clocks jtag_clock]  -to [get_clocks wb_bus_clock_d4]
	set_false_path   -from [get_ports scan_test_se]		set_false_path   -from [get_ports scan_test_se]
	set_false_path   -from [get_ports ext_reset_n]		set_false_path   -from [get_ports ext_reset_n]
	set_false_path   -through [list [get_pins clock_rst_gen_i/rst_and_i/std_and/Z]]		set_false_path   -through [list [get_pins clock_rst_gen_i/rst_and_i/std_and/Z]]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[15]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[15]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[15]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[15]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[14]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[14]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[14]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[14]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[13]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[13]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[13]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[13]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[12]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[12]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[12]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[12]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[11]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[11]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[11]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[11]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[10]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[10]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[10]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[10]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[9]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[9]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[9]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[9]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[8]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[8]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[8]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[8]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[7]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[7]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[7]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[7]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[6]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[6]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[6]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[6]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[5]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[5]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[5]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[5]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[4]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[4]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[4]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[4]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[3]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[3]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[3]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[3]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[2]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[2]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[2]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[2]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[1]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[1]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[1]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[1]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[0]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {cpu_irqs[0]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[0]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {cpu_irqs[0]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[31]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[31]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[31]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[31]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[30]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[30]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[30]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[30]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[29]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[29]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[29]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[29]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[28]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[28]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[28]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[28]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[27]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[27]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[27]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[27]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[26]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[26]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[26]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[26]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[25]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[25]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[25]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[25]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[24]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[24]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[24]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[24]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[23]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[23]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[23]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[23]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[22]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[22]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[22]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[22]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[21]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[21]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[21]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[21]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[20]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[20]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[20]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[20]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[19]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[19]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[19]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[19]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[18]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[18]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[18]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[18]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[17]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[17]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[17]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[17]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[16]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[16]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[16]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[16]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[15]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[15]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[15]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[15]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[14]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[14]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[14]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[14]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[13]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[13]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[13]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[13]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[12]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[12]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[12]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[12]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[11]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[11]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[11]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[11]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[10]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[10]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[10]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[10]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[9]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[9]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[9]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[9]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[8]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[8]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[8]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[8]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[7]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[7]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[7]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[7]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[6]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[6]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[6]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[6]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[5]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[5]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[5]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[5]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[4]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[4]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[4]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[4]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[3]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[3]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[3]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[3]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[2]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[2]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[2]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[2]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[1]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[1]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[1]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[1]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[0]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_i[0]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[0]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_i[0]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[31]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[31]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[31]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[31]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[30]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[30]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[30]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[30]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[29]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[29]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[29]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[29]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[28]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[28]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[28]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[28]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[27]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[27]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[27]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[27]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[26]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[26]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[26]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[26]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[25]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[25]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[25]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[25]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[24]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[24]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[24]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[24]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[23]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[23]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[23]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[23]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[22]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[22]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[22]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[22]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[21]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[21]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[21]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[21]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[20]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[20]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[20]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[20]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[19]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[19]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[19]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[19]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[18]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[18]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[18]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[18]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[17]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[17]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[17]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[17]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[16]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[16]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[16]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[16]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[15]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[15]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[15]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[15]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[14]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[14]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[14]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[14]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[13]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[13]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[13]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[13]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[12]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[12]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[12]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[12]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[11]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[11]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[11]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[11]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[10]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[10]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[10]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[10]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[9]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[9]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[9]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[9]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[8]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[8]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[8]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[8]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[7]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[7]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[7]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[7]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[6]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[6]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[6]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[6]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[5]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[5]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[5]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[5]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[4]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[4]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[4]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[4]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[3]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[3]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[3]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[3]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[2]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[2]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[2]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[2]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[1]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[1]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[1]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[1]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[0]}]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_i[0]}]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[0]}]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_i[0]}]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_ack_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_ack_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_ack_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_ack_i]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_err_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_err_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_err_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_err_i]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_rty_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_rty_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_rty_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_rty_i]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_ack_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_ack_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_ack_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_ack_i]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_err_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_err_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_err_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_err_i]
	set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_rty_i]		set_input_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_rty_i]
	set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_rty_i]		set_input_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_rty_i]
	set_input_delay -clock jtag_clock  -max 6  [get_ports jtag_tms]		set_input_delay -clock jtag_clock  -max 6  [get_ports jtag_tms]
	set_input_delay -clock jtag_clock  -min 0  [get_ports jtag_tms]		set_input_delay -clock jtag_clock  -min 0  [get_ports jtag_tms]
	set_input_delay -clock jtag_clock  -max 6  [get_ports jtag_tdi]		set_input_delay -clock jtag_clock  -max 6  [get_ports jtag_tdi]
	set_input_delay -clock jtag_clock  -min 0  [get_ports jtag_tdi]		set_input_delay -clock jtag_clock  -min 0  [get_ports jtag_tdi]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[31]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[31]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[31]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[31]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[30]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[30]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[30]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[30]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[29]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[29]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[29]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[29]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[28]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[28]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[28]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[28]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[27]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[27]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[27]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[27]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[26]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[26]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[26]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[26]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[25]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[25]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[25]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[25]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[24]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[24]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[24]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[24]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[23]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[23]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[23]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[23]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[22]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[22]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[22]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[22]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[21]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[21]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[21]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[21]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[20]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[20]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[20]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[20]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[19]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[19]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[19]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[19]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[18]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[18]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[18]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[18]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[17]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[17]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[17]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[17]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[16]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[16]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[16]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[16]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[15]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[15]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[15]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[15]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[14]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[14]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[14]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[14]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[13]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[13]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[13]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[13]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[12]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[12]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[12]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[12]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[11]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[11]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[11]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[11]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[10]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[10]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[10]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[10]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[9]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[9]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[9]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[9]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[8]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[8]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[8]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[8]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[7]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[7]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[7]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[7]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[6]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[6]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[6]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[6]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[5]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[5]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[5]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[5]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[4]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[4]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[4]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[4]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_data_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_data_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[31]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[31]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[31]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[31]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[30]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[30]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[30]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[30]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[29]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[29]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[29]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[29]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[28]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[28]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[28]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[28]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[27]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[27]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[27]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[27]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[26]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[26]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[26]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[26]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[25]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[25]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[25]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[25]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[24]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[24]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[24]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[24]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[23]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[23]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[23]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[23]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[22]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[22]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[22]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[22]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[21]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[21]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[21]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[21]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[20]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[20]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[20]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[20]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[19]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[19]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[19]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[19]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[18]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[18]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[18]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[18]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[17]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[17]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[17]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[17]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[16]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[16]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[16]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[16]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[15]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[15]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[15]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[15]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[14]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[14]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[14]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[14]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[13]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[13]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[13]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[13]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[12]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[12]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[12]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[12]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[11]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[11]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[11]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[11]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[10]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[10]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[10]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[10]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[9]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[9]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[9]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[9]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[8]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[8]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[8]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[8]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[7]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[7]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[7]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[7]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[6]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[6]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[6]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[6]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[5]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[5]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[5]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[5]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[4]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[4]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[4]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[4]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_addr_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_addr_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m0_sel_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m0_sel_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[31]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[31]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[31]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[31]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[30]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[30]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[30]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[30]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[29]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[29]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[29]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[29]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[28]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[28]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[28]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[28]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[27]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[27]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[27]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[27]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[26]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[26]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[26]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[26]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[25]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[25]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[25]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[25]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[24]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[24]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[24]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[24]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[23]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[23]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[23]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[23]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[22]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[22]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[22]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[22]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[21]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[21]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[21]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[21]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[20]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[20]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[20]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[20]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[19]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[19]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[19]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[19]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[18]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[18]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[18]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[18]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[17]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[17]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[17]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[17]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[16]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[16]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[16]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[16]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[15]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[15]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[15]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[15]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[14]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[14]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[14]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[14]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[13]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[13]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[13]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[13]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[12]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[12]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[12]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[12]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[11]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[11]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[11]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[11]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[10]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[10]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[10]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[10]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[9]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[9]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[9]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[9]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[8]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[8]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[8]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[8]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[7]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[7]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[7]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[7]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[6]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[6]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[6]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[6]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[5]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[5]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[5]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[5]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[4]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[4]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[4]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[4]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_data_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_data_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[31]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[31]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[31]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[31]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[30]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[30]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[30]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[30]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[29]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[29]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[29]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[29]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[28]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[28]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[28]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[28]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[27]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[27]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[27]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[27]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[26]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[26]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[26]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[26]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[25]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[25]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[25]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[25]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[24]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[24]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[24]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[24]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[23]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[23]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[23]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[23]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[22]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[22]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[22]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[22]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[21]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[21]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[21]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[21]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[20]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[20]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[20]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[20]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[19]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[19]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[19]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[19]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[18]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[18]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[18]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[18]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[17]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[17]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[17]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[17]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[16]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[16]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[16]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[16]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[15]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[15]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[15]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[15]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[14]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[14]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[14]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[14]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[13]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[13]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[13]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[13]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[12]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[12]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[12]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[12]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[11]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[11]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[11]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[11]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[10]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[10]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[10]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[10]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[9]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[9]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[9]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[9]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[8]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[8]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[8]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[8]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[7]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[7]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[7]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[7]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[6]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[6]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[6]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[6]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[5]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[5]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[5]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[5]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[4]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[4]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[4]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[4]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_addr_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_addr_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[3]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[3]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[3]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[3]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[2]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[2]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[2]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[2]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[1]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[1]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[1]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[1]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[0]}]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports {wb_m1_sel_o[0]}]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[0]}]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports {wb_m1_sel_o[0]}]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_we_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_we_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_we_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_we_o]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_cyc_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_cyc_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_cyc_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_cyc_o]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_stb_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m0_stb_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_stb_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m0_stb_o]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_we_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_we_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_we_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_we_o]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_cyc_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_cyc_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_cyc_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_cyc_o]
	set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_stb_o]		set_output_delay -clock wb_bus_clock  -max 4.8  [get_ports wb_m1_stb_o]
	set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_stb_o]		set_output_delay -clock wb_bus_clock  -min 0  [get_ports wb_m1_stb_o]
	set_output_delay -clock jtag_clock  -max 6  [get_ports jtag_tdo]		set_output_delay -clock jtag_clock  -max 6  [get_ports jtag_tdo]
	set_output_delay -clock jtag_clock  -min 0  [get_ports jtag_tdo]		set_output_delay -clock jtag_clock  -min 0  [get_ports jtag_tdo]