Path 1: MET External Delay Assertion Endpoint: Data_h_iop[2] (v) checked with leading edge of 'clk_test_mode' Beginpoint: gbl_slave_test/JTAG_MODULE/TAP_CONTROLLER/TCB_SHIFTDR/QN (v) triggered by trailing edge of 'clk_test_mode' Analysis View: test_mode_SETUP_WW Other End Arrival Time 0.000 - External Delay 0.000 + Phase Shift 160.000 = Required Time 160.000 - Arrival Time 134.975 = Slack Time 25.025 Clock Fall Edge 80.000 + Drive Adjustment 0.212 = Beginpoint Arrival Time 80.212 +----------------------------------------------------------------------------------------------------------------+ | Instance | Arc | Cell | Delay | Arrival | Required | | | | | | Time | Time | |----------------------------------------------------+-----------------+-----------+--------+---------+----------| | | BSTck_ip v | | | 80.212 | 105.237 | | gbl_slave_io/PAD_BSTck_ip | PAD v -> Y v | A_ICGUP | 0.741 | 80.953 | 105.978 | | n_BSTck_Y_L1_I0 | A v -> Q v | BUCLX6 | 1.076 | 82.030 | 107.054 | | n_BSTck_Y_L2_I0 | A v -> Q ^ | INLX8 | 0.207 | 82.237 | 107.262 | | n_BSTck_Y_L3_I0 | A ^ -> Q ^ | BUCLX6 | 1.112 | 83.349 | 108.374 | | n_BSTck_Y_L4_I0 | A ^ -> Q ^ | BUCLX6 | 1.453 | 84.802 | 109.827 | | n_BSTck_Y_L5_I0 | A ^ -> Q ^ | BUCLX6 | 1.188 | 85.990 | 111.015 | | n_BSTck_Y_L6_I0 | A ^ -> Q ^ | BUCLX6 | 1.011 | 87.001 | 112.026 | | n_BSTck_Y_L7_I0 | A ^ -> Q v | INLX8 | 0.136 | 87.137 | 112.162 | | n_BSTck_Y_L8_I0 | A v -> Q v | BUCLX6 | 1.073 | 88.210 | 113.235 | | n_BSTck_Y_L9_I0 | A v -> Q v | BUCLX6 | 1.033 | 89.243 | 114.268 | | n_BSTck_Y_L10_I0 | A v -> Q v | BUCLX6 | 1.313 | 90.556 | 115.581 | | n_BSTck_Y_L11_I0 | A v -> Q v | BUCLX6 | 1.748 | 92.304 | 117.329 | | n_BSTck_Y_L12_I0 | A v -> Q ^ | INLX8 | 0.330 | 92.634 | 117.659 | | n_BSTck_Y_L13_I0 | A ^ -> Q v | INLX8 | 0.163 | 92.797 | 117.822 | | n_BSTck_Y_L14_I0 | A v -> Q ^ | INLX8 | 0.212 | 93.009 | 118.034 | | n_BSTck_Y_L15_I0 | A ^ -> Q ^ | BUCLX6 | 1.007 | 94.016 | 119.041 | | n_BSTck_Y_L16_I0 | A ^ -> Q v | INLX8 | 0.134 | 94.151 | 119.176 | | n_BSTck_Y_L17_I0 | A v -> Q v | BUCLX6 | 1.370 | 95.521 | 120.546 | | n_BSTck_Y_L18_I1 | A v -> Q v | BULX6 | 0.608 | 96.129 | 121.154 | | n_BSTck_Y_L19_I0 | A v -> Q v | BULX8 | 0.675 | 96.804 | 121.829 | | gbl_slave_test/JTAG_MODULE/TAP_CONTROLLER/TCB_SHIF | CN v -> QN v | DFFSLX1 | 1.943 | 98.747 | 123.772 | | TDR | | | | | | | gbl_slave_test/JTAG_MODULE/TAP_CONTROLLER/preCTSFE | A v -> Q ^ | INLX1 | 0.496 | 99.243 | 124.268 | | _OFC911_JTAG_BOUNDARY_SHIFTDR | | | | | | | gbl_slave_test/JTAG_MODULE/TAP_CONTROLLER/preCTSFE | A ^ -> Q v | INLX4 | 0.955 | 100.198 | 125.223 | | _OFC912_JTAG_BOUNDARY_SHIFTDR | | | | | | | gbl_slave_test/preCTSFE_OFC914_JTAG_BOUNDARY_SHIFT | A v -> Q v | BULX8 | 1.926 | 102.123 | 127.148 | | DR | | | | | | | gbl_slave_test/g314 | B v -> Q ^ | NA2LX1 | 1.679 | 103.803 | 128.828 | | gbl_slave_test/g313 | A ^ -> Q v | INLX6 | 1.341 | 105.143 | 130.168 | | gbl_slave_test/preCTSFE_OFC472_ScanEnable_i_S | A v -> Q v | BULX8 | 2.262 | 107.405 | 132.430 | | gbl_slave_test/preCTSFE_OFC476_ScanEnable_i_S | A v -> Q v | BULX6 | 1.078 | 108.483 | 133.508 | | gbl_slave_test/postCTSFE_OFC1021_ScanEnable_i_S | A v -> Q v | BULX8 | 1.609 | 110.092 | 135.117 | | gbl_slave_test/preCTSFE_OFC483_ScanEnable_i_S | A v -> Q v | BULX8 | 2.241 | 112.333 | 137.357 | | gbl_slave_test/preCTSFE_OFC488_ScanEnable_i_S | A v -> Q ^ | INLX6 | 1.020 | 113.353 | 138.377 | | gbl_slave_test/preCTSFE_OFC493_ScanEnable_i_S | A ^ -> Q v | INLX6 | 0.545 | 113.898 | 138.923 | | gbl_slave_test/preCTSFE_OFC509_ScanEnable_i_S | A v -> Q v | BULX8 | 1.757 | 115.655 | 140.680 | | gbl_slave_test/\SIOM_BIDIR_SI_Data_h_iop[2] /g16 | B v -> Q v | OR2LX1 | 0.703 | 116.358 | 141.382 | | preCTSFE_OFC202_n_369 | A v -> Q ^ | INLX1 | 0.659 | 117.017 | 142.042 | | preCTSFE_OFC203_n_369 | A ^ -> Q v | INLX6 | 0.410 | 117.427 | 142.452 | | gbl_slave_io/\PAD_Data_h_iop[2] | EN v -> PAD v | A_BBC12NP | 17.548 | 134.975 | 160.000 | | | Data_h_iop[2] v | | 0.000 | 134.975 | 160.000 | +----------------------------------------------------------------------------------------------------------------+