Cadence Extraction QRC - Parasitic Extractor - Version 10.1.1-s149 Tue May 10 04:59:16 PDT 2011 ---------------------------------------------------------------------------------------------------- Copyright 2010 Cadence Design Systems, Inc. INFO (EXTQRCXOPT-243) : For Assura inputs, if the "output_setup -directory_name" option was not specified, it is automatically set to the input directory. INFO (LBRCXU-108): Starting /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools/assura/bin/rcxToDfII /home/vinay_rao/create/gen/invcheck/layout/qrc/__qrc.rcx_cmd -t -f /home/vinay_rao/create/gen/invcheck/layout/qrc/extview.tmp -w /home/vinay_rao/create/gen/invcheck/layout/qrc -cdslib /home/vinay_rao/create/cds.lib Virtuoso Framework License (111) was checked out successfully. Total checkout time was 0.07s. @(#)$CDS: rcxToDfII version av4.1:Production:dfII6.1.4:IC6.1.4.500.10 01/19/2011 09:16 (sjfql268v5) $ sub-version 4.1_USR2_HF2, integ signature 2011-01-19-0844 run on localhost.localdomain from /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools.lnx86/assura/bin/32bit/rcxToDfII on Tue Mar 12 16:24:02 2013 Loading umc65ll/libInit.il ... Loading umc65ll/loadCxt.ile ... done! Loading context 'umc65ll' from library 'umc65ll' ... done! Loading context 'pdkUtils' from library 'umc65ll' ... done! Loading context 'Util' from library 'umc65ll' ... done! Loading umc65ll/libInitCustomExit.il ... Loading context 'oxf_cb' from library 'umc65ll' ... done! done! Loaded umc65ll/libInit.il successfully! *WARNING* No library model for device "N_18_LL ivpcell". *WARNING* No library model for device "N_BPW_18_LL ivpcell". *WARNING* No library model for device "P_18_LL ivpcell". *WARNING* No library model for device "N_18_LLNVT ivpcell". *WARNING* No library model for device "N_BPW_18_LLNVT ivpcell". *WARNING* No library model for device "N_18_LLRF ivpcell". *WARNING* No library model for device "N_BPW_18_LLRF ivpcell". *WARNING* No library model for device "P_18_LLRF ivpcell". *WARNING* No library model for device "N_PG52P5_LLHVT". *WARNING* No library model for device "N_PG52P5_LLHVT". *WARNING* No library model for device "N_PD52P5_LLHVT". *WARNING* No library model for device "N_PD52P5_LLHVT". *WARNING* No library model for device "P_L52P5_LLHVT". *WARNING* No library model for device "N_PG97P4_LLHVT". *WARNING* No library model for device "N_PG97P4_LLHVT". *WARNING* No library model for device "N_PD97P4_LLHVT". *WARNING* No library model for device "N_PD97P4_LLHVT". *WARNING* No library model for device "P_L97P4_LLHVT". *WARNING* No library model for device "N_PG144P5CAM_LLHVT". *WARNING* No library model for device "N_PG144P5CAM_LLHVT". *WARNING* No library model for device "N_PD144P5CAM_LLHVT". *WARNING* No library model for device "N_PD144P5CAM_LLHVT". *WARNING* No library model for device "N_CPD144P5CAM_LLHVT". *WARNING* No library model for device "N_CPD144P5CAM_LLHVT". *WARNING* No library model for device "P_L144P5CAM_LLHVT". *WARNING* No library model for device "RSNPO_EFUSE". *WARNING* No library model for device "RSPPO_EFUSE". *WARNING* No library model for device "RM8". *WARNING* No library model for device "RAL". *WARNING* No library model for device "VARMIS_18_LLRF ivpcell". *WARNING* No library model for device "DION_LL_A". *WARNING* No library model for device "DION_LL_A". *WARNING* No library model for device "DIOP_LL_A". *WARNING* No library model for device "NCAP_18_LL ivpcell". *WARNING* No library model for device "PCAP_18_LL ivpcell". *WARNING* No library model for device "PCAP_18_LL ivpcell". INFO (LBRCXU-114): Finished /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools/assura/bin/rcxToDfII INFO (LBRCXM-642): Constructing the RCX run script INFO (LBMISC-215205): *** Cadence Extraction QRC Techgen -trans VERSION 10.1 Linux 32 bit - (Tue May 10 03:44:13 PDT 2011) *** INFO (CAPGEN-41199): Techgen -trans results will be written to directory: /home/vinay_rao/create/gen/invcheck/layout/qrc WARNING (CAPGEN-41466): process layer 'DIFF_diel' maps to one or more extraction layers that do not appear in the lvsfile. WARNING (CAPGEN-41446): Substrate layer 'DIFF_diel' will be automatically generated during extraction due to incomplete p2lvs mapping. This may lead to unintended results. Forking: /cad/cadence/ext101/ccstools/cdsind1/Software/EXT10.1.1HF2_lnx86/tools.lnx86/extraction/bin/32bit//capgen -techdir /home/vinay_rao/create/RuleDecks/Assura/qrc/typical -lvs /home/vinay_rao/create/gen/invcheck/layout/lvs.xcn -p2lvs /home/vinay_rao/create/RuleDecks/Assura/qrc/typical/qrcTechFile -reseqn -sw3d -length_units meters -blocking NCAPGATE_12,PLY_C,PSD_C,DIFF_diel -blocking NCAPGATE_18,PLY_C,PSD_C,DIFF_diel -blocking PCAPGATE_12_PSUB,PLY_C,PSD_C,DIFF_diel -blocking PCAPGATE_12_TWELL,PLY_C,PSD_C,DIFF_diel -blocking PCAPGATE_18_PSUB,PLY_C,PSD_C,DIFF_diel -blocking PCAPGATE_18_TWELL,PLY_C,PSD_C,DIFF_diel -blocking RFSYMBOL,DIFF_diel,PSD_C,PLY_C,ME1_C,ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -res_blocking RFSYMBOL,PLY,M1,M2,M3,M4,M5,M6,M7,M8,AL_RDL -blocking MESTACK123,DIFF_diel,ME1_C,ME2_C,ME3_C -res_blocking MESTACK123,M1,M2,M3 -blocking MESTACK234,DIFF_diel,ME2_C,ME3_C,ME4_C -res_blocking MESTACK234,M2,M3,M4 -blocking MESTACK1234,DIFF_diel,ME1_C,ME2_C,ME3_C,ME4_C -res_blocking MESTACK1234,M1,M2,M3,M4 -blocking MESTACK345,DIFF_diel,ME3_C,ME4_C,ME5_C -res_blocking MESTACK345,M3,M4,M5 -blocking MESTACK2345,DIFF_diel,ME2_C,ME3_C,ME4_C,ME5_C -res_blocking MESTACK2345,M2,M3,M4,M5 -blocking MESTACK12345,DIFF_diel,ME1_C,ME2_C,ME3_C,ME4_C,ME5_C -res_blocking MESTACK12345,M1,M2,M3,M4,M5 -blocking MESTACK456,DIFF_diel,ME4_C,ME5_C,ME6_C -res_blocking MESTACK456,M4,M5,M6 -blocking MESTACK3456,DIFF_diel,ME3_C,ME4_C,ME5_C,ME6_C -res_blocking MESTACK3456,M3,M4,M5,M6 -blocking MESTACK23456,DIFF_diel,ME2_C,ME3_C,ME4_C,ME5_C,ME6_C -res_blocking MESTACK23456,M2,M3,M4,M5,M6 -blocking MESTACK123456,DIFF_diel,ME1_C,ME2_C,ME3_C,ME4_C,ME5_C,ME6_C -res_blocking MESTACK123456,M1,M2,M3,M4,M5,M6 -p PLY_C,Allgates,PSD_C -cap_unit 1 /home/vinay_rao/create/gen/invcheck/layout/qrc Successfully created RCX script '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx.sh' INFO (LBRCXM-581): Checked out '1' license(s) for Virtuoso_QRC_Extraction_XL 10.10 INFO (LBRCXM-608): Executing command /bin/ksh /home/vinay_rao/create/gen/invcheck/layout/qrc/rcx.sh ##======================================================= ##ADD_EXPLICIT_VIAS=Y ##ADD_BULK_TERMINAL=N ##AGDS_FILE=/dev/null ##AGDS_LAYER_MAP_FILE=/dev/null ##HCCI_DEV_PROP_FILE=/dev/null ##AGDS_SPICE_FILE=/dev/null ##AGDS_TEXT_LAYERS= ##ARRAY_VIAS_SPACING= ##ASSURA_RUN_DIR=/home/vinay_rao/create/gen/invcheck/layout ##ASSURA_RUN_NAME=lvs ##BLACK_BOX_CELLS=/dev/null ##BREAK_WIDTH= ##CAP_COUPLING_FACTOR=1.0 ##CAP_EXTRACT_MODE=coupled ##CAP_GROUND=GND ##CAP_MODELS=no ##DANGLINGR=N ##DEVICE_FINGER_DELIMITER='@' ##DF2=Y ##DRACULA_RUN_DIR= ##DRACULA_RUN_NAME= ##ENABLESENSITIVITYEXTRACTION=N ##EXCLUDE_FLOAT_LIMIT= ##EXCLUDE_FLOAT_DECOPULING_FACTOR= ##EXCLUDE_FLOATING_NETS=N ##EXCLUDE_NETS_REDUCERC=/dev/null ##EXCLUDE_SELF_CAPS=Y ##IGNORE_GATE_DIFFUSION_FRINGING_CAP=Y ##EXTRACT=both ##EXTRACT_MOS_DIFFUSION_AP=N ##EXTRACT_MOS_DIFFUSION_HIGH= ##EXTRACT_MOS_DIFFUSION_RES=N ##FILTER_SIZE=2.0 ##FIXED_NETS_FILE=/dev/null ##FMAX= ##FRACTURE_LENGTH_UNITS=MICRONS ##FREQUENCY_FILE=/dev/null ##GROUND_NETS= ##GROUND_NETS_FILE=/home/vinay_rao/create/gen/invcheck/layout/qrc.GLOBAL.nets ##HCCI_DEV_PROP=7 ##HCCI_INST_PROP=6 ##HCCI_NET_PROP=5 ##HCCI_RULE_FILE= ##HCCI_RUN_DIR= ##HCCI_RUN_NAME= ##HEADER_FILE=/dev/null ##HIERARCHY_DELIMITER='/' ##HRCX_CELLS_FILE=/dev/null ##IMPORT_GLOBALS=Y ##LADDER_NETWORK=N ##LVS_SOURCE=assura ##M_FACTORR= ##M_FACTORW=N ##MACRO_CELL=Y ##MAX_FRACTURE_LENGTH=infinite ##MAX_SIGNALS= ##MERGE_PARALLEL_R=N ##MINC=1e-17 ##MINC_BY_PERCENTAGE=1 ##MINR=0.001 ##NET_NAME_SPACE=layout ##NETS_FILE=/dev/null ##OUTPUT=/home/vinay_rao/create/gen/invcheck/layout/qrc/extview.tmp ##OUTPUT_NET_NAME_SPACE=layout ##PARASITIC_BLOCKING_DEVICE_CELLS_TYPEgray ##PARASITIC_CAP_MODELS=no ##PARASITIC_RES_MODELS=comment ##PARASITIC_RES_LENGTH=N ##PARASITIC_RES_WIDTH=Y ##PARASITIC_RES_WIDTH_DRAWN=N ##PARASITIC_RES_UNIT=N ##PARTIAL_CAP_BLOCKING=N ##PEEC=N ##PIN_ORDER_FILE=/dev/null ##PIPE_ADVGEN= ##PIPE_SPICE2DB= ##POWER_NETS= ##POWER_NETS_FILE=/dev/null ##RC_FREQUENCY= ##RCXDIR=/home/vinay_rao/create/gen/invcheck/layout/qrc ##RCXFS_HIGH=N ##RCXFS_NETS_FILE=/dev/null ##RCXFS_TYPE=none ##RCXFS_CUTOFF_DISTANCE= ##RCXFS_CUTOFF_DISTANCE= ##RCXFS_CUTOFF_DISTANCE= ##RCXFS_CUTOFF_DISTANCE= ##RCXFS_CUTOFF_DISTANCE= ##RCXFS_VIA_OFF=N ##REDUCERC=N ##REGION_LIMIT= ##RES_MODELS=no ##RISE_TIME= ##SAVE_FILL_SHAPES=N ##SINGLE_CAP_EDSPF=N ##SHOW_DIODES=N ##SKIN_FREQUENCY= ##SPEF=N ##SPEF_UNITS= ##SPLIT_PINS=N ##SPLIT_PINS_DISTANCE= ##SUB_NODE_CHAR='#' ##SUBSTRATE_PROFILE=/dev/null ##SUBSTRATE_STAMPING_OFF=N ##TEMPDIR=/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp ##TEMPERATURE=25.0 ##TYPE=full ##USER_REGION=/dev/null ##VARIANT_CELL_FILE=/dev/null ##VIA_EFFECT_OFF=N ##VIRTUAL_FILL= ##XREF=/dev/null,/dev/null ##XY_COORDINATES=c,r ##======================================================= CASE_SENSITIVE=TRUE export CASE_SENSITIVE TEMPDIR=`setTempDir /home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp` setTempDir /home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_tempexport TEMPDIR DEVICE_FINGER_DELIMITER='@' HIERARCHY_DELIMITER='/' cd /home/vinay_rao/create/gen/invcheck/layout/qrc cat < caps2dversion * caps2d version: 10 ENDCAT cat < flattransUnit.info meters ENDCAT QRC=Y export QRC cat < topcellxcn.info /home/vinay_rao/create/gen/invcheck/layout/lvs.xcn ENDCAT #==========================================================# # Generate RCX input data from Assura LVS database #==========================================================# GOALIE2DIR=/cad/cadence/ext101/ccstools/cdsind1/Software/EXT10.1.1HF2_lnx86/tools.lnx86/extraction/bin export GOALIE2DIR vdbToRcx /home/vinay_rao/create/gen/invcheck/layout lvs -unit meters -- -V1 \ -H satfile -r /home/vinay_rao/create/gen/invcheck/layout/lvs.xcn -gl \ VDD,GND -df2 -xgl @(#)$CDS: vdbToRcx version av4.1:Production:dfII6.1.4:IC6.1.4.500.10 01/19/2011 09:17 (sjfql268v5) $ 6.2 Linux 32 bit - (Tue Jul 14 10:58:38 PDT 2009) Opening LVS data for lvs in /home/vinay_rao/create/gen/invcheck/layout Open time is 0.1 sec. Build pins/attributes took 0.2 sec. Processing m1_textt 4 shapes 0.0 sec. create satfile took 0.07 user, 0.00 sys, 0.00 elapsed, 254856.0 kbytes write edge m1_textt took 0.00 user, 0.00 sys, 0.00 elapsed, 254856.0 kbytes Building net map file. 0.0 sec. create netmap file took 0.00 user, 0.00 sys, 0.00 elapsed, 254856.0 kbytes create net file took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes WARNING (LBCLV-5663): No bipolar models provided. Can't create bipolar files WARNING (LBCLV-5660): No resistor models provided. Can't create resistor files WARNING (LBCLV-5654): No capacitor models provided. Can't create capacitor file WARNING (LBCLV-5657): No diode models provided. Can't create diode files WARNING (LBCLV-5706): no generic models in rule file Device creation took 0.0 sec Processing psdcon 15 shapes 0.0 sec. write edge psdcon took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing pwCon 1 shapes 0.0 sec. write edge pwCon took 0.01 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing nwCon 1 shapes 0.0 sec. write edge nwCon took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing nsdcon 16 shapes 0.0 sec. write edge nsdcon took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing polycon 1 shapes 0.0 sec. write edge polycon took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge RFSYMBOL took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK456 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK345 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK234 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK123 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK3456 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK2345 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK1234 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK23456 took 0.01 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK12345 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge MESTACK123456 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge RFSYMBOL_NCAP took 0.00 user, 0.01 sys, 0.00 elapsed, 254992.0 kbytes write edge P_LLRVT_G_MOS_3 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes write edge N_LLRVT_G_MOS_1 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing RFSYMBOL 0 shapes 0.0 sec. Processing MESTACK456 0 shapes 0.0 sec. Processing MESTACK345 0 shapes 0.0 sec. Processing MESTACK234 0 shapes 0.0 sec. Processing MESTACK123 0 shapes 0.0 sec. Processing MESTACK3456 0 shapes 0.0 sec. Processing MESTACK2345 0 shapes 0.0 sec. Processing MESTACK1234 0 shapes 0.0 sec. Processing MESTACK23456 0 shapes 0.0 sec. Processing MESTACK12345 0 shapes 0.0 sec. Processing MESTACK123456 0 shapes 0.0 sec. Processing RFSYMBOL_NCAP 0 shapes 0.0 sec. Processing P_LLRVT_G_MOS_3 2 shapes 0.0 sec. Processing N_LLRVT_G_MOS_1 2 shapes 0.0 sec. Processing psd 3 shapes 0.0 sec. write edge psd took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing M1 4 shapes 0.0 sec. write edge M1 took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing ptap 1 shapes 0.0 sec. write edge ptap took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing ntap 1 shapes 0.0 sec. write edge ntap took 0.00 user, 0.00 sys, 0.00 elapsed, 254992.0 kbytes Processing nsd 4 shapes 0.0 sec. write edge nsd took 0.00 user, 0.00 sys, 0.00 elapsed, 255288.0 kbytes Processing PLY 1 shapes 0.0 sec. write edge PLY took 0.00 user, 0.00 sys, 0.00 elapsed, 255480.0 kbytes WARNING (LBCLV-5576): Ignoring duplicate layer-generation request of RFSYMBOL (id 29) Processing RFSYMBOL 0 shapes 0.0 sec. Processing PWELL_A 1 shapes 0.0 sec. write edge PWELL_A took 0.00 user, 0.00 sys, 0.00 elapsed, 255612.0 kbytes Processing wel_A 1 shapes 0.0 sec. write edge wel_A took 0.01 user, 0.00 sys, 0.00 elapsed, 255876.0 kbytes Processing wel 1 shapes 0.0 sec. write edge wel took 0.00 user, 0.00 sys, 0.00 elapsed, 256068.0 kbytes Processing PSUB 1 shapes 0.0 sec. write edge PSUB took 0.00 user, 0.00 sys, 0.00 elapsed, 256200.0 kbytes Processing DNW_SOFTCHK 1 shapes 0.0 sec. write edge DNW_SOFTCHK took 0.00 user, 0.00 sys, 0.00 elapsed, 256468.0 kbytes WARNING (LBCLV-5576): Ignoring duplicate layer-generation request of RFSYMBOL (id 29) Processing RFSYMBOL 0 shapes 0.0 sec. sort edges took 0.04 user, 0.21 sys, 0.00 elapsed, 4272.0 kbytes sort labels took 0.00 user, 0.01 sys, 1.00 elapsed, 4176.0 kbytes sort edges and labels took 0.17 user, 0.27 sys, 1.00 elapsed, 256208.0 kbytes vdbToRcx System Usage: Elapsed: 2 seconds. CPU: 0.4 seconds Memory 140 Meg GOALIE2DIR=/cad/cadence/ext101/ccstools/cdsind1/Software/EXT10.1.1HF2_lnx86/tools.lnx86/extraction/bin/32bit/ export GOALIE2DIR geom N_LLRVT_G_MOS_1 nsd - N_LLRVT_G_MOS_1,10,i,1 geom P_LLRVT_G_MOS_3 psd - P_LLRVT_G_MOS_3,10,i,1 #==========================================================# # Generate power list #==========================================================# cat global.net > power_list #==========================================================# # Ensure vias do not extend beyond routing #==========================================================# geom -V polycon M1 PLY - polycon_M1_PLY,111,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6180.0 kbytes geom -V nsdcon M1 nsd - nsdcon_M1_nsd,111,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6180.0 kbytes geom -V psdcon M1 psd - psdcon_M1_psd,111,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6180.0 kbytes geom -V pwCon M1 ptap - pwCon_M1_ptap,111,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6180.0 kbytes geom -V nwCon M1 ntap - nwCon_M1_ntap,111,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6180.0 kbytes geom -V PSUB ptap - PSUB_ptap_ovia,11,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6164.0 kbytes geom -V wel ntap - wel_ntap_ovia,11,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6164.0 kbytes geom -V DNW_SOFTCHK ntap - DNW_SOFTCHK_ntap_ovia,11,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6164.0 kbytes geom -V PWELL_A PSUB - PWELL_A_PSUB_ovia,11,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6164.0 kbytes geom -V wel_A wel - wel_A_wel_ovia,11,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6164.0 kbytes #==========================================================# # Flatten net file, routing, via and device layers #==========================================================# SAVEDIR=`beginFlattenInputs` beginFlattenInputsexport SAVEDIR /bin/mv -f NET h_NET flatnet -V -li -h '/' h_NET NET flatnet took 0.00 user, 0.00 sys, 0.00 elapsed, 5924.0 kbytes netprint -V -N1 power_list:power_list_nums NET flattenTransistorData N_LLRVT_G_MOS_1 meters flattub took 0.00 user, 0.01 sys, 0.00 elapsed, 5888.0 kbytes flatnet took 0.00 user, 0.01 sys, 0.00 elapsed, 5916.0 kbytes flattrans took 0.00 user, 0.01 sys, 0.00 elapsed, 5936.0 kbytes flattenTransistorData P_LLRVT_G_MOS_3 meters flattub took 0.00 user, 0.01 sys, 0.00 elapsed, 5888.0 kbytes flatnet took 0.00 user, 0.01 sys, 0.00 elapsed, 5916.0 kbytes flattrans took 0.00 user, 0.01 sys, 0.00 elapsed, 5936.0 kbytes flattenLayers -m polycon nsdcon psdcon pwCon nwCon M1 PLY nsd ntap psd ptap \ polycon_M1_PLY nsdcon_M1_nsd psdcon_M1_psd pwCon_M1_ptap \ nwCon_M1_ntap PSUB_ptap_ovia PSUB wel_ntap_ovia wel \ DNW_SOFTCHK_ntap_ovia DNW_SOFTCHK PWELL_A_PSUB_ovia PWELL_A \ wel_A_wel_ovia wel_A flattub took 0.11 user, 0.31 sys, 0.00 elapsed, 5820.0 kbytes endFlattenInputs #==========================================================# # Initialize CAP_GROUND variable #==========================================================# CAP_GROUND=`findCapGround -g GND NET` findCapGround -g GND NETecho "CAP_GROUND=" ${CAP_GROUND} CAP_GROUND= 2 export CAP_GROUND #==========================================================# # Segregate interconnect into resistive and non-resistive #==========================================================# selectNetsByNumber power_list_nums DNW_SOFTCHK p_rDNW_SOFTCHK np_rDNW_SOFTCHK epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums M1 p_rM1 np_rM1 epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums PLY p_rPLY np_rPLY epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums PSUB p_rPSUB np_rPSUB epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums PWELL_A p_rPWELL_A np_rPWELL_A epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums nsd p_rnsd np_rnsd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums ntap p_rntap np_rntap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums psd p_rpsd np_rpsd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums ptap p_rptap np_rptap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums wel p_rwel np_rwel epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums wel_A p_rwel_A np_rwel_A epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums polycon_M1_PLY p_rpolycon_M1_PLY np_rpolycon_M1_PLY epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums nsdcon_M1_nsd p_rnsdcon_M1_nsd np_rnsdcon_M1_nsd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums psdcon_M1_psd p_rpsdcon_M1_psd np_rpsdcon_M1_psd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums pwCon_M1_ptap p_rpwCon_M1_ptap np_rpwCon_M1_ptap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes selectNetsByNumber power_list_nums nwCon_M1_ntap p_rnwCon_M1_ntap np_rnwCon_M1_ntap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes #==========================================================# # Create resistor cut regions between resistive # interconnect levels #==========================================================# mergevia -V -cnt np_rpolycon_M1_PLY rpolycon_M1_PLY - np_rM1 np_rPLY mergevia took 0.00 user, 0.00 sys, 0.00 elapsed, 10344.0 kbytes #==========================================================# # Create resistive interconnect MOSFET terminals #==========================================================# createMosfetGateTerminal N_LLRVT_G_MOS_1 np_rPLY N_LLRVT_G_MOS_1_mgvia write edges took 0.00 user, 0.00 sys, 0.00 elapsed, 4088.0 kbytes sort edges took 0.00 user, 0.00 sys, 0.00 elapsed, 4120.0 kbytes geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes createMosfetGateTerminal P_LLRVT_G_MOS_3 np_rPLY P_LLRVT_G_MOS_3_mgvia write edges took 0.00 user, 0.00 sys, 0.00 elapsed, 4088.0 kbytes sort edges took 0.00 user, 0.00 sys, 0.00 elapsed, 4120.0 kbytes geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes #==========================================================# # Assign net numbers to cut regions #==========================================================# connect -V -relocate NET np_rDNW_SOFTCHK:np_rDNW_SOFTCHK.conn \ np_rPSUB:np_rPSUB.conn np_rPWELL_A:np_rPWELL_A.conn \ np_rnsd:np_rnsd.conn np_rntap:np_rntap.conn np_rpsd:np_rpsd.conn \ np_rptap:np_rptap.conn np_rwel:np_rwel.conn np_rwel_A:np_rwel_A.conn \ rpolycon_M1_PLY N_LLRVT_G_MOS_1_mgvia P_LLRVT_G_MOS_3_mgvia - \ DNW_SOFTCHK_ntap_ovia,1,5 PSUB_ptap_ovia,2,7 PWELL_A_PSUB_ovia,3,2 \ wel_A_wel_ovia,9,8 wel_ntap_ovia,8,5 - relocate took 0.01 user, 0.17 sys, 0.00 elapsed, 111692.0 kbytes connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111692.0 kbytes #==========================================================# # Assign net numbers to resistor vias #==========================================================# geom -V nsdcon_M1_nsd np_rnsd.conn - tmp_rnsdcon_M1_nsd,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes mergevia -V -i -cnt tmp_rnsdcon_M1_nsd rnsdcon_M1_nsd - np_rM1 np_rnsd mergevia took 0.00 user, 0.00 sys, 0.00 elapsed, 10344.0 kbytes /bin/rm -f tmp_rnsdcon_M1_nsd geom -V nwCon_M1_ntap np_rntap.conn - tmp_rnwCon_M1_ntap,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes mergevia -V -i -cnt tmp_rnwCon_M1_ntap rnwCon_M1_ntap - np_rM1 np_rntap mergevia took 0.00 user, 0.00 sys, 0.00 elapsed, 10344.0 kbytes /bin/rm -f tmp_rnwCon_M1_ntap geom -V psdcon_M1_psd np_rpsd.conn - tmp_rpsdcon_M1_psd,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes mergevia -V -i -cnt tmp_rpsdcon_M1_psd rpsdcon_M1_psd - np_rM1 np_rpsd mergevia took 0.00 user, 0.01 sys, 0.00 elapsed, 10344.0 kbytes /bin/rm -f tmp_rpsdcon_M1_psd geom -V pwCon_M1_ptap np_rptap.conn - tmp_rpwCon_M1_ptap,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes mergevia -V -i -cnt tmp_rpwCon_M1_ptap rpwCon_M1_ptap - np_rM1 np_rptap mergevia took 0.00 user, 0.00 sys, 0.00 elapsed, 10344.0 kbytes /bin/rm -f tmp_rpwCon_M1_ptap #==========================================================# # Assign net numbers to nonresistive layers #==========================================================# epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rnsd.conn tmp_nsd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_nsd -c np_rnsd.conn tmp1_nsd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_nsd np_rnsd - tmp1_nsd,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_nsd,tmp1_nsd - np_rnsd,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6020.0 kbytes /bin/rm -f tmp_nsd tmp1_nsd epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rntap.conn tmp_ntap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_ntap -c np_rntap.conn tmp1_ntap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_ntap np_rntap - tmp1_ntap,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_ntap,tmp1_ntap - np_rntap,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6016.0 kbytes /bin/rm -f tmp_ntap tmp1_ntap epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rpsd.conn tmp_psd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_psd -c np_rpsd.conn tmp1_psd epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_psd np_rpsd - tmp1_psd,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_psd,tmp1_psd - np_rpsd,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6020.0 kbytes /bin/rm -f tmp_psd tmp1_psd epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rptap.conn tmp_ptap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_ptap -c np_rptap.conn tmp1_ptap epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_ptap np_rptap - tmp1_ptap,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_ptap,tmp1_ptap - np_rptap,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6016.0 kbytes /bin/rm -f tmp_ptap tmp1_ptap epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rPSUB.conn tmp_PSUB epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_PSUB -c np_rPSUB.conn tmp1_PSUB epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_PSUB np_rPSUB - tmp1_PSUB,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_PSUB,tmp1_PSUB - np_rPSUB,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6016.0 kbytes /bin/rm -f tmp_PSUB tmp1_PSUB epick -V -reo -e rnsdcon_M1_nsd -e rnwCon_M1_ntap -e rpsdcon_M1_psd -e \ rpwCon_M1_ptap np_rwel.conn tmp_wel epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes epick -V -reo -e tmp_wel -c np_rwel.conn tmp1_wel epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes geom -V tmp1_wel np_rwel - tmp1_wel,11,i,2 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V tmp_wel,tmp1_wel - np_rwel,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6016.0 kbytes /bin/rm -f tmp_wel tmp1_wel #==========================================================# # Generate resistor command file #==========================================================# cat < res.mod np_rM1,(s,w:0.09,0.09,0.179444:0.09,0.18,0.152222:0.09,0.27,0.141667:0.09,0.36,0.133333:0.18,0.09,0.166111:0.18,0.18,0.148889:0.18,0.27,0.140556:0.18,0.36,0.132222:0.27,0.09,0.155:0.27,0.18,0.143333:0.27,0.27,0.136111:0.27,0.36,0.129444:0.36,0.09,0.150556:0.36,0.18,0.142222:0.36,0.27,0.134444:0.36,0.36,0.128889),ME1_C(i) +:T,0.0025,0,25 +:t,30,30,30,rpolycon_M1_PLY +:t,35,35,35,rnsdcon_M1_nsd +:t,35,35,35,rpsdcon_M1_psd +:t,35,35,35,rpwCon_M1_ptap +:t,35,35,35,rnwCon_M1_ntap np_rPLY,11.4,PLY_C(j) +:T,0.0017,0,25 rnsdcon_M1_nsd,35,nsdcon(l) rnwCon_M1_ntap,35,nwCon(o) rpolycon_M1_PLY,30,polycon(k) rpsdcon_M1_psd,35,psdcon(m) rpwCon_M1_ptap,35,pwCon(n) ENDCAT #==========================================================# # Process text layers #==========================================================# flatlabel -V -tc -F m1_textt L1T0 INFO (FLTLBL-89003): exec labsort -V L1T0 sort labels took 0.00 user, 0.00 sys, 0.00 elapsed, 4040.0 kbytes flatlabel took 0.00 user, 0.00 sys, 0.00 elapsed, 5760.0 kbytes #==========================================================# # Generate layer map file for resistance extraction #==========================================================# cat < p2elayermapfile ME1_C p_rM1,np_rM1 PLY_C p_rPLY,np_rPLY ENDCAT #==========================================================# # Parasitic R extraction with default precision #==========================================================# rex -V -m -pd -I'#' -tech /home/vinay_rao/create/RuleDecks/Assura/qrc/typical \ -map p2elayermapfile -wee p2elayermapfile -N NET -e -e2 -rP res.mod \ np_rPLY::PLY_C_cut::-0.0015 \ np_rM1::ME1_C_cut::s,w:0.09,0.09,0.0025:0.09,0.18,-0.009:0.09,0.27,-0.011:0.09,0.36,-0.013:0.18,0.09,0.013:0.18,0.18,0.0005:0.18,0.27,0.0005:0.18,0.36,-0.0025:0.27,0.09,0.0195:0.27,0.18,-0.004:0.27,0.27,-0.0045:0.27,0.36,-0.01:0.36,0.09,0.0255:0.36,0.18,-0.007:0.36,0.27,-0.007:0.36,0.36,-0.013 \ - rnsdcon_M1_nsd,2,T rnwCon_M1_ntap,2,T rpolycon_M1_PLY,1,2,T \ rpsdcon_M1_psd,2,T rpwCon_M1_ptap,2,T N_LLRVT_G_MOS_1_mgvia,1,z \ P_LLRVT_G_MOS_3_mgvia,1,z - L1T0,2,I body label 'GND' from 'L1T0' at (1.0500,0.3600) missed body body label 'VDD' from 'L1T0' at (2.5800,4.3950) missed body INFO (REX-163527): 2 body labels from 'L1T0' missed body rex took 0.03 user, 0.06 sys, 0.00 elapsed, 23016.0 kbytes #==========================================================# # Form resistive via layers #==========================================================# stamp -V -B -i np_rM1 np_rpolycon_M1_PLY connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111684.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes connect took 0.00 user, 0.01 sys, 0.00 elapsed, 111680.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes stamp took 0.09 user, 0.17 sys, 0.00 elapsed, 5752.0 kbytes geom -V np_rpolycon_M1_PLY,p_rpolycon_M1_PLY - rpolycon_M1_PLY,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6020.0 kbytes stamp -V -B -i rnsdcon_M1_nsd np_rnsdcon_M1_nsd connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111680.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes connect took 0.00 user, 0.01 sys, 0.00 elapsed, 111684.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes stamp took 0.09 user, 0.16 sys, 0.00 elapsed, 5752.0 kbytes geom -V np_rnsdcon_M1_nsd,p_rnsdcon_M1_nsd - rnsdcon_M1_nsd,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes stamp -V -B -i rpsdcon_M1_psd np_rpsdcon_M1_psd connect took 0.01 user, 0.00 sys, 0.00 elapsed, 111680.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111684.0 kbytes inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes stamp took 0.08 user, 0.17 sys, 1.00 elapsed, 5752.0 kbytes geom -V np_rpsdcon_M1_psd,p_rpsdcon_M1_psd - rpsdcon_M1_psd,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes stamp -V -B -i rpwCon_M1_ptap np_rpwCon_M1_ptap connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111552.0 kbytes INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stamprTpSII3' is empty INFO (INTER-122059): 'rpwCon_M1_ptap' is empty inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes connect took 0.00 user, 0.01 sys, 0.00 elapsed, 111552.0 kbytes INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stampSdW72p' is empty INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stamprTpSII3' is empty inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes stamp took 0.09 user, 0.17 sys, 0.00 elapsed, 5752.0 kbytes geom -V np_rpwCon_M1_ptap,p_rpwCon_M1_ptap - rpwCon_M1_ptap,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes stamp -V -B -i rnwCon_M1_ntap np_rnwCon_M1_ntap connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111552.0 kbytes INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stamprPPMCom' is empty INFO (INTER-122059): 'rnwCon_M1_ntap' is empty inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111552.0 kbytes INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stampUrLBzK' is empty INFO (INTER-122059): '/home/vinay_rao/create/gen/invcheck/layout/qrc/rcx_temp/stamprPPMCom' is empty inter took 0.00 user, 0.00 sys, 0.00 elapsed, 6144.0 kbytes stamp took 0.08 user, 0.17 sys, 0.00 elapsed, 5752.0 kbytes geom -V np_rnwCon_M1_ntap,p_rnwCon_M1_ntap - rnwCon_M1_ntap,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes #==========================================================# # Reconnect MOSFET devices #==========================================================# reconnect -V -n NET -se2 mwires.res -t \ N_LLRVT_G_MOS_1.trans:N_LLRVT_G_MOS_1.transr N_LLRVT_G_MOS_1 \ np_rnsd,N_LLRVT_G_MOS_1_mgvia,np_rPSUB -t \ P_LLRVT_G_MOS_3.trans:P_LLRVT_G_MOS_3.transr P_LLRVT_G_MOS_3 \ np_rpsd,P_LLRVT_G_MOS_3_mgvia,np_rwel reconnect took 0.00 user, 0.02 sys, 0.00 elapsed, 6024.0 kbytes changeTransFileNameAP N_LLRVT_G_MOS_1.trans N_LLRVT_G_MOS_1.transr changeTransFileNameAP P_LLRVT_G_MOS_3.trans P_LLRVT_G_MOS_3.transr #==========================================================# # Form capacitance layers for resistive process layers #==========================================================# geom -V -i p_rPLY,np_rPLY - so_PLY_C,1,n geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V p_rPLY,np_rPLY - PLY_C,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V -i p_rM1,np_rM1 - so_ME1_C,1,n geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V p_rM1,np_rM1 - ME1_C,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes #==========================================================# # Form capacitance layers for non-resistive process layers #==========================================================# emerge -V p_rnsd np_rnsd nsd emerge took 0.00 user, 0.00 sys, 0.00 elapsed, 5648.0 kbytes emerge -V p_rntap np_rntap ntap emerge took 0.00 user, 0.00 sys, 0.00 elapsed, 5648.0 kbytes emerge -V p_rpsd np_rpsd psd emerge took 0.00 user, 0.00 sys, 0.00 elapsed, 5648.0 kbytes emerge -V p_rptap np_rptap ptap emerge took 0.00 user, 0.00 sys, 0.00 elapsed, 5648.0 kbytes grow -V .001 nsd mask grow took 0.00 user, 0.00 sys, 0.00 elapsed, 6024.0 kbytes geom -V ntap mask - ntap,10,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes grow -V .001 ntap g_ntap geom -V mask,g_ntap - mask,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6020.0 kbytes geom -V psd mask - psd,10,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes grow -V .001 psd g_psd grow took 0.00 user, 0.00 sys, 0.00 elapsed, 6024.0 kbytes geom -V mask,g_psd - mask,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V ptap mask - ptap,10,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes geom -V nsd,ntap,psd,ptap - PSD_C,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6036.0 kbytes createEmptyLayer ALRDL_C createEmptyLayer ME8_C createEmptyLayer ME7_C createEmptyLayer ME6_C createEmptyLayer ME5_C createEmptyLayer ME4_C createEmptyLayer ME3_C createEmptyLayer ME2_C #==========================================================# # Form substrate #==========================================================# xytoebbox -V -g 48.002 -e ALRDL_C,ME8_C,ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C DIFF_diel WARNING (XYTBOX-202011): existing file 'DIFF_diel' will be overwritten xytoebbox took 0.00 user, 0.00 sys, 0.00 elapsed, 4392.0 kbytes connect -V DIFF_diel:tmp_DIFF_diel - - connect took 0.00 user, 0.00 sys, 0.00 elapsed, 111684.0 kbytes epick -V -reo -D ${CAP_GROUND} tmp_DIFF_diel DIFF_diel epick took 0.00 user, 0.00 sys, 0.00 elapsed, 5796.0 kbytes /bin/rm -f tmp_DIFF_diel geom -V DIFF_diel PSD_C - DIFF_diel,10,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6028.0 kbytes #==========================================================# # Compensate for via capacitance effects #==========================================================# geom -V PLY_C,rnsdcon_M1_nsd,rpsdcon_M1_psd,rpwCon_M1_ptap,rnwCon_M1_ntap - PLY_C,1,i,1 geom took 0.00 user, 0.00 sys, 0.00 elapsed, 6052.0 kbytes geom N_LLRVT_G_MOS_1,P_LLRVT_G_MOS_3 - qrcgate,1,i,1 #==========================================================# # Create sip/sw3d/cn3d capacitance data files #==========================================================# cat < sip.cmd sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc PLY_C,ME1_C -n 1.5 -i 0,1.501 -b \ ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p \ ME2_C,key 0,1.5 - ME2_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME1_C,ME2_C -n 1.5 -i 0,1.501 -b \ ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME3_C,key \ 0,1.5 - ME3_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME2_C,ME3_C -n 1.5 -i 0,1.501 -b \ ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME4_C,key 0,1.5 \ - ME4_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME3_C,ME4_C -n 2.5 -i 0,2.501 -b \ ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME5_C,key 0,2.5 - \ ME5_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME4_C,ME5_C -n 2.5 -i 0,2.501 -b \ ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME6_C,key 0,2.5 - ME6_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME5_C,ME6_C -n 3 -i 0,3.001 -b \ ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME8_C,ALRDL_C -j 0.2 -Maxw 4.5 -p ME7_C,key 0,3 - ME7_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME6_C,ME7_C -n 22.185 -i \ 0,22.186 -b \ ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ALRDL_C -j 2 -Maxw 45 -p ME8_C,key 0,22.185 - ME8_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc ME7_C,ME8_C -n 24 -i 0,24.001 -b \ ME8_C,ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel \ -j 3 -Maxw 67.5 -p ALRDL_C,key 0,24 - ALRDL_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -cp PLY_C,Allgates,PSD_C -n 1.8 -i \ 0,1.801 -b PSD_C,DIFF_diel -t \ ME1_C,ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.06 -Maxw \ 2.7 -p PLY_C,key 0,1.8 - PLY_C.sip sip -V -cgnd ${CAP_GROUND} -s -o -sub 2 -mlc PLY_C -n 1.35 -i 0,1.351 -b \ PLY_C,PSD_C,DIFF_diel -t \ ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.09 -Maxw 2.025 \ -p ME1_C,key 0,1.35 - ME1_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -b \ ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -Maxw \ 67.5 -p ME8_C,key,ALRDL_C,key 0,24,0 - ME8_C_ALRDL_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ALRDL_C -b \ ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -Maxw 67.5 \ -p ME7_C,key,ALRDL_C,key 0,24,0 - ME7_C_ALRDL_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b \ ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C \ -Maxw 45 -p ME7_C,key,ME8_C,key 0,22.185,0 - ME7_C_ME8_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME8_C -b \ ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C -Maxw \ 45 -p ME6_C,key,ME8_C,key 0,22.185,0 - ME6_C_ME8_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b \ ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C \ -Maxw 4.5 -p ME6_C,key,ME7_C,key 0,3,0 - ME6_C_ME7_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME7_C -b \ ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C -Maxw \ 4.5 -p ME5_C,key,ME7_C,key 0,3,0 - ME5_C_ME7_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b \ ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C \ -Maxw 2.25 -p ME5_C,key,ME6_C,key 0,2.5,0 - ME5_C_ME6_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME6_C -b \ ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C -Maxw \ 2.25 -p ME4_C,key,ME6_C,key 0,2.5,0 - ME4_C_ME6_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b \ ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C \ -Maxw 2.25 -p ME4_C,key,ME5_C,key 0,2.5,0 - ME4_C_ME5_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME5_C -b \ ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw \ 2.25 -p ME3_C,key,ME5_C,key 0,2.5,0 - ME3_C_ME5_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel \ -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME3_C,key,ME4_C,key \ 0,1.5,0 - ME3_C_ME4_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME4_C -b \ ME1_C,PLY_C,PSD_C,DIFF_diel -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw \ 2.25 -p ME2_C,key,ME4_C,key 0,1.5,0 - ME2_C_ME4_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p \ ME2_C,key,ME3_C,key 0,1.5,0 - ME2_C_ME3_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME3_C -b \ PLY_C,PSD_C,DIFF_diel -t ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw \ 2.25 -p ME1_C:ME1_C_cut,key,ME3_C,key 0,1.5,0 - ME1_C_ME3_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -b PLY_C,PSD_C,DIFF_diel -t \ ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p \ ME1_C:ME1_C_cut,key,ME2_C,key 0,1.5,0 - ME1_C_ME2_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -L3A -h -R ME2_C -b PSD_C,DIFF_diel -t \ ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -k ME1_C:0.18 -Maxw 2.7 \ -p PLY_C:PLY_C_cut,key,ME2_C,key 0,1.8,0 - PLY_C_ME2_C.sip sip -V -s -cgnd ${CAP_GROUND} -sub 2 -h -R ME1_C,PLY_C -b PSD_C,DIFF_diel -t \ ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.7 -p \ PLY_C:PLY_C_cut,key,ME1_C:ME1_C_cut,key 0,1.8,0 - PLY_C_ME1_C.sip sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b \ ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -p \ ME8_C,ALRDL_C - ME8_C_ALRDL_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b \ ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C \ -p ME7_C,ME8_C - ME7_C_ME8_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b \ ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C \ -p ME6_C,ME7_C - ME6_C_ME7_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b \ ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C \ -p ME5_C,ME6_C - ME5_C_ME6_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel \ -t ME6_C,ME7_C,ME8_C,ALRDL_C -p ME4_C,ME5_C - ME4_C_ME5_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME3_C,ME4_C - ME3_C_ME4_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b ME1_C,PLY_C,PSD_C,DIFF_diel -t \ ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME2_C,ME3_C - \ ME2_C_ME3_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b PLY_C,PSD_C,DIFF_diel -t \ ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME1_C:ME1_C_cut,ME2_C \ - ME1_C_ME2_C.sw3d sw3d -V -cgnd ${CAP_GROUND} -sub 2 -b PSD_C,DIFF_diel -t \ ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p \ PLY_C:PLY_C_cut,ME1_C:ME1_C_cut - PLY_C_ME1_C.sw3d ENDCAT #==========================================================# # Prepare gate capacitance blocking layers #==========================================================# emerge -V N_LLRVT_G_MOS_1 P_LLRVT_G_MOS_3 Allgates emerge took 0.00 user, 0.00 sys, 0.00 elapsed, 5648.0 kbytes #==========================================================# # Run pax16 to generate capfile #==========================================================# pax16 -V -ignore_cf_table -add_via_effect PLY_C:0.12 -scf sip.cmd \ -M_perim_off -c \ /home/vinay_rao/create/RuleDecks/Assura/qrc/typical/qrcTechFile -f \ DIFF_diel PSD_C PLY_C:PLY_C_cut ME1_C:ME1_C_cut ME2_C ME3_C ME4_C \ ME5_C ME6_C ME7_C ME8_C ALRDL_C Allgates - \ /home/vinay_rao/create/RuleDecks/Assura/qrc/typical/qrcTechFile - - \ NET - capfile rdpaxcmd took 0.55 user, 0.05 sys, 0.00 elapsed, 41600.0 kbytes pax took 0.00 user, 0.00 sys, 0.00 elapsed, 41808.0 kbytes INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc PLY_C,ME1_C -n 1.5 -i 0,1.501 -b ME1_C,PLY_C,PSD_C,DIFF_diel -t ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME2_C,key 0,1.5 - ME2_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc ME1_C,ME2_C -n 1.5 -i 0,1.501 -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME3_C,key 0,1.5 - ME3_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc ME2_C,ME3_C -n 1.5 -i 0,1.501 -b ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME4_C,key 0,1.5 - ME4_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc ME3_C,ME4_C -n 2.5 -i 0,2.501 -b ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME5_C,key 0,2.5 - ME5_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc ME4_C,ME5_C -n 2.5 -i 0,2.501 -b ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C -j 0.1 -Maxw 2.25 -p ME6_C,key 0,2.5 - ME6_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc ME5_C,ME6_C -n 3 -i 0,3.001 -b ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C -j 0.2 -Maxw 4.5 -p ME7_C,key 0,3 - ME7_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 1 -V -cgnd 2 -s -o -sub 2 -mlc ME6_C,ME7_C -n 22.185 -i 0,22.186 -b ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C -j 2 -Maxw 45 -p ME8_C,key 0,22.185 - ME8_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 0 -V -cgnd 2 -s -o -sub 2 -mlc ME7_C,ME8_C -n 24 -i 0,24.001 -b ME8_C,ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -j 3 -Maxw 67.5 -p ALRDL_C,key 0,24 - ALRDL_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -cp PLY_C,Allgates,PSD_C -n 1.8 -i 0,1.801 -b PSD_C,DIFF_diel -t ME1_C,ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.06 -Maxw 2.7 -p PLY_C,key 0,1.8 -wconvex 0.12 -old_via_effect - PLY_C.sip 3d sip took 0.01 user, 0.04 sys, 0.00 elapsed, 41900.0 kbytes INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -mlc_num 2 -V -cgnd 2 -s -o -sub 2 -mlc PLY_C -n 1.35 -i 0,1.351 -b PLY_C,PSD_C,DIFF_diel -t ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -j 0.09 -Maxw 2.025 -p ME1_C,key 0,1.35 - ME1_C.sip 3d sip took 0.02 user, 0.04 sys, 0.00 elapsed, 42192.0 kbytes INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -b ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -Maxw 67.5 -p ME8_C,key,ALRDL_C,key 0,24,0 - ME8_C_ALRDL_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ALRDL_C -b ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -Maxw 67.5 -p ME7_C,key,ALRDL_C,key 0,24,0 - ME7_C_ALRDL_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C -Maxw 45 -p ME7_C,key,ME8_C,key 0,22.185,0 - ME7_C_ME8_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME8_C -b ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C -Maxw 45 -p ME6_C,key,ME8_C,key 0,22.185,0 - ME6_C_ME8_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C -Maxw 4.5 -p ME6_C,key,ME7_C,key 0,3,0 - ME6_C_ME7_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME7_C -b ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C -Maxw 4.5 -p ME5_C,key,ME7_C,key 0,3,0 - ME5_C_ME7_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME5_C,key,ME6_C,key 0,2.5,0 - ME5_C_ME6_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME6_C -b ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME4_C,key,ME6_C,key 0,2.5,0 - ME4_C_ME6_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME4_C,key,ME5_C,key 0,2.5,0 - ME4_C_ME5_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME5_C -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME3_C,key,ME5_C,key 0,2.5,0 - ME3_C_ME5_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME3_C,key,ME4_C,key 0,1.5,0 - ME3_C_ME4_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME4_C -b ME1_C,PLY_C,PSD_C,DIFF_diel -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME2_C,key,ME4_C,key 0,1.5,0 - ME2_C_ME4_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b ME1_C,PLY_C,PSD_C,DIFF_diel -t ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME2_C,key,ME3_C,key 0,1.5,0 - ME2_C_ME3_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME3_C -b PLY_C,PSD_C,DIFF_diel -t ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME1_C:ME1_C_cut,key,ME3_C,key 0,1.5,0 - ME1_C_ME3_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -b PLY_C,PSD_C,DIFF_diel -t ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.25 -p ME1_C:ME1_C_cut,key,ME2_C,key 0,1.5,0 - ME1_C_ME2_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -L3A -h -R ME2_C -b PSD_C,DIFF_diel -t ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -k ME1_C:0.18 -Maxw 2.7 -p PLY_C:PLY_C_cut,key,ME2_C,key 0,1.8,0 - PLY_C_ME2_C.sip INFO (PAXSXTN-142046): exec sip -NEWP -PAX16 -V -s -cgnd 2 -sub 2 -h -R ME1_C,PLY_C -b PSD_C,DIFF_diel -t ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -Maxw 2.7 -p PLY_C:PLY_C_cut,key,ME1_C:ME1_C_cut,key 0,1.8,0 - PLY_C_ME1_C.sip 3d sip took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -p ME8_C,ALRDL_C - ME8_C_ALRDL_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ALRDL_C -p ME7_C,ME8_C - ME7_C_ME8_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME8_C,ALRDL_C -p ME6_C,ME7_C - ME6_C_ME7_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME7_C,ME8_C,ALRDL_C -p ME5_C,ME6_C - ME5_C_ME6_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME6_C,ME7_C,ME8_C,ALRDL_C -p ME4_C,ME5_C - ME4_C_ME5_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel -t ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME3_C,ME4_C - ME3_C_ME4_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b ME1_C,PLY_C,PSD_C,DIFF_diel -t ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME2_C,ME3_C - ME2_C_ME3_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b PLY_C,PSD_C,DIFF_diel -t ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p ME1_C:ME1_C_cut,ME2_C - ME1_C_ME2_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes INFO (PAXSXTN-142046): exec sw3d -NEWP -PAX16 -V -cgnd 2 -sub 2 -b PSD_C,DIFF_diel -t ME2_C,ME3_C,ME4_C,ME5_C,ME6_C,ME7_C,ME8_C,ALRDL_C -p PLY_C:PLY_C_cut,ME1_C:ME1_C_cut - PLY_C_ME1_C.sw3d sw3d took 0.00 user, 0.00 sys, 0.00 elapsed, 42360.0 kbytes pax16 took 0.00 user, 0.02 sys, 0.00 elapsed, 39988.0 kbytes #==========================================================# # Generate netlister data files #==========================================================# cat < lvsmos.mod xN_12_LLRVT#20ivpcell, 100000.0, 0, xN_12_LLRVT, unused, unused, 100000.0 N_12_LLRVT#20ivpcell, 100000.0, 0, N_12_LLRVT, unused, unused, 100000.0 xP_12_LLRVT#20ivpcell, 100000.0, 0, xP_12_LLRVT, unused, unused, 100000.0 P_12_LLRVT#20ivpcell, 100000.0, 0, P_12_LLRVT, unused, unused, 100000.0 ENDCAT #==========================================================# # Perform RC reduction #==========================================================# xreduce -V -mergecap -n NET -d1 -e \ ALRDL_C,ME8_C,ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel \ -sr -rmselfC -g ${CAP_GROUND},1.0 -danglingR -minR 0.001 -rP \ np_rM1.res,np_rPLY.res,mwires.res,rnsdcon_M1_nsd.res,rnwCon_M1_ntap.res,rpolycon_M1_PLY.res,rpsdcon_M1_psd.res,rpwCon_M1_ptap.res \ -minC 1e-17 -minCper 1 -cap capfile L1T0 N_LLRVT_G_MOS_1.transr \ P_LLRVT_G_MOS_3.transr INFO (XREDUCE-199107): Total number of resistors is 11 INFO (XREDUCE-199108): d1 option renamed 0 nets INFO (XREDUCE-199109): minR option removed 0 resistors (0%) INFO (XREDUCE-199054): Total number of capacitors in capfile is 35 INFO (XREDUCE-199052): mergecap required for 0 (0%) of 15 nets INFO (XREDUCE-199113): danglingR option removed 0 resistors INFO (XREDUCE-199063): Removed 6 self-capacitors in capfile.cmodel.cap INFO (XREDUCE-199065): minC small capacitor decoupling set to 1% INFO (XREDUCE-199066): minC option decoupled 5 capacitors in capfile INFO (XREDUCE-199067): the number of capacitors decreased by 7 (20%) xreduce took 0.03 user, 0.17 sys, 0.00 elapsed, 9100.0 kbytes #==========================================================# # Generate HSPICE file #==========================================================# advgen -V -g0 -li -f -n -o HSPICE -TL L1T0 -sc caps2dversion -mx capfile \ ALRDL_C,ME8_C,ME7_C,ME6_C,ME5_C,ME4_C,ME3_C,ME2_C,ME1_C,PLY_C,PSD_C,DIFF_diel \ -rPmw res.mod np_rM1.res,Rnp_rM1.dev2 np_rPLY.res,Rnp_rPLY.dev2 \ rnsdcon_M1_nsd.res,Rrnsdcon_M1_nsd.dev2 \ rnwCon_M1_ntap.res,RrnwCon_M1_ntap.dev2 \ rpolycon_M1_PLY.res,Rrpolycon_M1_PLY.dev2 \ rpsdcon_M1_psd.res,Rrpsdcon_M1_psd.dev2 \ rpwCon_M1_ptap.res,RrpwCon_M1_ptap.dev2 -rPmw mwires.mod \ mwires.res,mwires.dev2 -ta lvsmos.mod,N_LLRVT_G_MOS_1.net \ N_LLRVT_G_MOS_1.transr -ta lvsmos.mod,P_LLRVT_G_MOS_3.net \ P_LLRVT_G_MOS_3.transr - NET - \ /home/vinay_rao/create/gen/invcheck/layout/qrc/extview.tmp process netfile took 0.00 user, 0.00 sys, 0.00 elapsed, 13344.0 kbytes advgen took: 0.22 user, 0.48 sys, 0.00 elapsed, 15912.0 kbytes #==========================================================# # Create _save_layers file for Assura extracted view #==========================================================# geom ME1_C np_rM1 - np_rM1,11,i,1 geom PLY_C np_rPLY - np_rPLY,11,i,1 geom rpolycon_M1_PLY np_rpolycon_M1_PLY - np_rpolycon_M1_PLY,11,i,1 stamp -i rnsdcon_M1_nsd nsdcon_M1_nsd stamp -i rnwCon_M1_ntap nwCon_M1_ntap stamp -i rpsdcon_M1_psd psdcon_M1_psd stamp -i rpwCon_M1_ptap pwCon_M1_ptap cat < _save_layers DIFF_diel DIFF_diel ME2_C ME2_C ME3_C ME3_C ME4_C ME4_C ME5_C ME5_C ME6_C ME6_C ME7_C ME7_C ME8_C ME8_C ALRDL_C ALRDL_C PSD_C np_rptap p_rptap np_rpsd p_rpsd np_rntap p_rntap np_rnsd p_rnsd polycon np_rpolycon_M1_PLY p_rpolycon_M1_PLY nsdcon np_rnsdcon_M1_nsd p_rnsdcon_M1_nsd psdcon np_rpsdcon_M1_psd p_rpsdcon_M1_psd pwCon np_rpwCon_M1_ptap p_rpwCon_M1_ptap nwCon np_rnwCon_M1_ntap p_rnwCon_M1_ntap M1 np_rM1 p_rM1 PLY np_rPLY p_rPLY nsd np_rnsd p_rnsd ntap np_rntap p_rntap psd np_rpsd p_rpsd ptap np_rptap p_rptap PSUB_ptap_ovia PSUB_ptap_ovia PSUB np_rPSUB p_rPSUB wel_ntap_ovia wel_ntap_ovia wel np_rwel p_rwel DNW_SOFTCHK_ntap_ovia DNW_SOFTCHK_ntap_ovia DNW_SOFTCHK np_rDNW_SOFTCHK p_rDNW_SOFTCHK PWELL_A_PSUB_ovia PWELL_A_PSUB_ovia PWELL_A np_rPWELL_A p_rPWELL_A wel_A_wel_ovia wel_A_wel_ovia wel_A np_rwel_A p_rwel_A ENDCAT INFO (LBRCXM-610): Extraction finished. INFO (LBRCXU-108): Starting /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools/assura/bin/rcxToDfII /home/vinay_rao/create/gen/invcheck/layout/qrc/__qrc.rcx_cmd -f /home/vinay_rao/create/gen/invcheck/layout/qrc/extview.tmp -w /home/vinay_rao/create/gen/invcheck/layout/qrc -cdslib /home/vinay_rao/create/cds.lib Virtuoso Framework License (111) was checked out successfully. Total checkout time was 0.07s. @(#)$CDS: rcxToDfII version av4.1:Production:dfII6.1.4:IC6.1.4.500.10 01/19/2011 09:16 (sjfql268v5) $ sub-version 4.1_USR2_HF2, integ signature 2011-01-19-0844 run on localhost.localdomain from /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools.lnx86/assura/bin/32bit/rcxToDfII on Tue Mar 12 16:24:15 2013 Loading umc65ll/libInit.il ... Loading umc65ll/loadCxt.ile ... done! Loading context 'umc65ll' from library 'umc65ll' ... done! Loading context 'pdkUtils' from library 'umc65ll' ... done! Loading context 'Util' from library 'umc65ll' ... done! Loading umc65ll/libInitCustomExit.il ... Loading context 'oxf_cb' from library 'umc65ll' ... done! done! Loaded umc65ll/libInit.il successfully! *WARNING* No library model for device "N_18_LL ivpcell". *WARNING* No library model for device "N_BPW_18_LL ivpcell". *WARNING* No library model for device "P_18_LL ivpcell". *WARNING* No library model for device "N_18_LLNVT ivpcell". *WARNING* No library model for device "N_BPW_18_LLNVT ivpcell". *WARNING* No library model for device "N_18_LLRF ivpcell". *WARNING* No library model for device "N_BPW_18_LLRF ivpcell". *WARNING* No library model for device "P_18_LLRF ivpcell". *WARNING* No library model for device "N_PG52P5_LLHVT". *WARNING* No library model for device "N_PG52P5_LLHVT". *WARNING* No library model for device "N_PD52P5_LLHVT". *WARNING* No library model for device "N_PD52P5_LLHVT". *WARNING* No library model for device "P_L52P5_LLHVT". *WARNING* No library model for device "N_PG97P4_LLHVT". *WARNING* No library model for device "N_PG97P4_LLHVT". *WARNING* No library model for device "N_PD97P4_LLHVT". *WARNING* No library model for device "N_PD97P4_LLHVT". *WARNING* No library model for device "P_L97P4_LLHVT". *WARNING* No library model for device "N_PG144P5CAM_LLHVT". *WARNING* No library model for device "N_PG144P5CAM_LLHVT". *WARNING* No library model for device "N_PD144P5CAM_LLHVT". *WARNING* No library model for device "N_PD144P5CAM_LLHVT". *WARNING* No library model for device "N_CPD144P5CAM_LLHVT". *WARNING* No library model for device "N_CPD144P5CAM_LLHVT". *WARNING* No library model for device "P_L144P5CAM_LLHVT". *WARNING* No library model for device "RSNPO_EFUSE". *WARNING* No library model for device "RSPPO_EFUSE". *WARNING* No library model for device "RM8". *WARNING* No library model for device "RAL". *WARNING* No library model for device "VARMIS_18_LLRF ivpcell". *WARNING* No library model for device "DION_LL_A". *WARNING* No library model for device "DION_LL_A". *WARNING* No library model for device "DIOP_LL_A". *WARNING* No library model for device "NCAP_18_LL ivpcell". *WARNING* No library model for device "PCAP_18_LL ivpcell". *WARNING* No library model for device "PCAP_18_LL ivpcell". Creating extracted view for gen invcheck layout Schematic cell - invcheck schematic gen Summary for gen/invcheck/av_extracted instance count totals: lib cell view total analogLib pcapacitor symbol 22 analogLib presistor symbol 11 umc65ll N_12_LLRVT ivpcell 2 umc65ll P_12_LLRVT ivpcell 2 extracted view creation completed cpu: 0.84 elap: 1 pf: 2 in: 0 out: 0 virt: 0M phys: 0M INFO (LBRCXU-114): Finished /cad/cadence/assura/ccstools/cdsind1/Software/ASSURA41OAISR_lnx86/tools/assura/bin/rcxToDfII INFO (LBRCXM-582): Checking in license for Virtuoso_QRC_Extraction_XL 10.10 INFO (LBRCXM-702): Run ended: Tue Mar 12 16:24:16 2013 INFO (LBRCXM-708): ***** QRC terminated normally *****