I have a CMOS digital circuit with normal supply of +5V. I need to include a D type divide by 2 circuit that has a separate supply of Vss = -6 and Vdd = 0 v. The clock input is derived from the normal logic by a resistive potential divider. How do I achieve this dual power supply? I cannot decide if I have a power supply problem or a digital divider problem since the clock signal is exactly as predicted but no divider digital output, or perhaps, both power supply and digital divider problems.
I am using Pspice A/D, transient analysis