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You put your design through a multitude of tools for various transformations. Going back to formal verification in between every change to rely on your simulation tools can be a rigorous approach, but wait... there is an easier way: Use equivalence checking, with Conformal® Equivalence Checker....

This is a continuation of last week's post Benedict Evans' on Tech in 2021 . That covered Covid Acceleration and the Great Unbundling. Today, the rest of his presentation. Harder Problems In the first 20 years of the inter...

If a picture is worth a thousand words, a video tells you the entire story. Cadence's subsystem SoC silicon for PCI Express (PCIe) 5.0 demo video shows you how we put together the latest technology in TSMC's advanced FinFET technology to bring to market a compelling, low-power solution and tested it...

我们生活在一个日趋复杂的世界中，尽可能的使用和组合各种工具及平台，以及其它的可用功能，这对于我们而言至关重要. 在此博客中， 我们将介绍如何使用Spectre Simulation 平台快速获得最优结果.

Pin delays are used to specify the time delay or length from the internal package connection to the pin’s mounting layer. It is critical to include pin delays when tuning high-speed nets to ensure signal performance. Pin delays are used in the ...