Cadence Blogs

I've been working with Arm for longer than Cadence has. In fact, I was working with Arm before it was Arm, back when the Arm 1 was a processor developed by Acorn Computers (the A in Arm originally stood for Acorn). I described my early involveme...

Cadence Fidelity CFD offers AutoSeal technology, a geometry clean-up tool for faster results for multiple design tests, reducing the time to meshing towards an efficient design process.

By Sherry Hess Recently I posted a blog on LinkedIn called "High Tech Everything" and it caught the attention of Microwave Journal.  As such, it have spawn a similar podcast on how Cadence is expanding into multiple verticals with system analysis solutions...

On May 12th, it was the Kaufman Award Ceremony and Banquet at which Cadence's CEO Anirudh Devgan was awarded the 2021 Phil Kaufman Award. Yes, I know it is 2022. Normally the award dinner is held late in the year, but for Covid-reasons, it was postpo...

https://youtu.be/F-dN8wy-iNc Made at Steve Brown's "moving to San Diego party" (camera Larry Lapides) Monday: no post Tuesday: TechInsights: Foundation for the Future Wednesday: Open RAN Phase 2 Thursday: What Is High-NA EUV? Friday: N...

The Cadence Learning and Support Portal is useful to academia in many ways: Online Training, Rapid Adoption Kits (RAKs), Generic Process Design Kits (GPDKs), troubleshooting database, and so much more. But with so many benefits, it is helpful to be a...

Cadence has a new book out. Written by Frank Schirrmeister and myself, it is called Hyperscale Computing Trends: 2022 Outlook. In some ways, it is similar to the Year of Breakfasts books that I have done each year for the last few years, a sort of be...

If you have worked with Peripheral Component Interconnect Express (PCIe) in the past, you might have heard Compute Link Express (CXL) is break-through technology for modern day compute requirements driven by high-performance computing, cloud, AI and ML. Of course, CXL buzz is for real and is well resonating...

The HotFix 028 of our 17.4-2019 release was rolled out at the end of March and is now available for download and installation. The release brings critical bug fixes, product enhancements, and new features. Let’s talk about some of the exciting...

I'm sure you know that the lowest levels of ICs fabricated at the most advanced nodes, basically anything at 5nm and below, use EUV lithography (extreme ultraviolet). You probably also know that only one company in the world, ASML in the Netherla...

On June 8th and 9th, it is CadenceLIVE Americas. It is planned to be in-person at the Santa Clara Convention Center in Silicon Valley and that is already your first important reason to join us! We are finally getting back to face-to-face networking, enjoying wonderful food and drinks, and seizing invaluable...

I first wrote about Open RAN in my post Fourth 4G Network Goes Live in Japan . Open RAN is a program driven by a group of European operators to build specifications for common architecture instead of getting "locked into" the closed architec...

Verifying bus performance by analyzing bandwidth and latency over time in chips is tricky. Renesas in collaboration with Cadence used a comprehensive emulation package and designed a new efficient bus performance verification scheme that helped them to witness a stellar performance with 160x speedup...

Low-Power synthesis is one of the important stages in the full IC flow. Here, you synthesize the design from behavioral description to gates while optimizing for dynamic and leakage power using various techniques. We understand that it is not always easy to estimate power, but Cadence offers a solution...

最新的电磁设计同步分析功能有助于提高 IC、IC 封装和高性能 PCB 设计的速度 美国加州圣何塞(DesignCon)—楷登电子（Cadence Design Systems, Inc.）在近期结束的 DesignCon 2022 展会上发布了用于 IC、IC 封装和高性能 PCB 设计电磁 (EM) 设计中同步分析的 Cadence® Clarity 3D Solver 最新版本。该版本的新功能和工作流程包括： 新的分布式网格划分功能，可提供至少 10 倍性...

The second day of the Linley Spring Processor Conference opened with a keynote by Jason Abt, the Chief Technology Officer of TechInsights, titled Foundations for the Future. There's a good chance you don't know who TechInsights is. Well, firs...

コンストレイント(制約条件)は、PCB デザインの要件が論理的、物理的の両方の観点で満たされることを保証するためのルールです。コンストレイントは、パーツ、ピン、ネットなどの様々なオブジェクトに定義できます。このブログでは、電気的ネットに定義されるコンストレイントに焦点を当てます。これらのコンストレイントには、スタブの長さや伝搬遅延("Propagation Delay")といった電気的なものと、ラインの最小幅やスタティックでのフェーズ公差といった物理的なものとがあります。設計...

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章“ Happy 10th Birthday ISO 26262” 。 space 汽车行业的“双十一” 去年11月11日是 ISO 26262 标准发布 10 周年纪念日，该标准于 2011 年 11 月 11 日首次发布，全称是《道路车辆功能安全》。这是一项有关汽车电气和（或）电子（E/E）系统功能安全的国际标准。该标...

A Logic Synthesis is a process of optimizing the design's area, timing, and power. You might be a beginner in the synthesis world, but we can help you sail through it smoothly. It's time to introduce yourself to our tool for synthesis , Genus Synthesis Solution. The ultimate goal of the Cadence...

設計意図やスタックアップ情報を設計の初期段階のうちに製造部門や製造委託先と共有しておけば、製品設計に影響を与え製品納入を遅らせてしまうような製造やアセンブリ関連の問題を回避することができます。しかし、製造データをやり取りするための標準的なコミュニケーション手段を持たない場合、レビューサイクルの中で情報が誤って解釈されたり、完全に失われたりする可能性があります。また、手作業で作成されたデータは統一性に欠け、必要なパラメータが不足している可能性もあります。もしも設計側と製造側の双方がIPC-2581...

Fidelity CFD mesh adaptation technique respects geometry, improves mesh quality, adapts to the near-wall shear layers, and reduces run-time for improved CFD solutions.

https://youtu.be/xADMKcqKLNg Made on Communication Hill with Sheep (camera Carey) Monday: Gabrièle Saucier on the History of IP Tuesday: ESD Alliance CEO Outlook 2022 Wednesday: Always On at D&R Thursday: A History of Cadence in the C...

No matter how your name is spelt in different countries, and how they say it, once they get to know you, people identify you as the same person. Ah! this is Chris, Cris, Kris, Kirshner, or Krishna. And I know this dude, even though he has transformed since I last saw him, and is 10 years older than...

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章 “How to Build a Data Center: It's All About the SerDes...and Thermal ”。 space 我们可能不需要建立一个数据中心，但很可能会参与设计用于数据中心的芯片；或者在关注数据中心的 IP；或者担心先进节点设计工具的某些方面，其中大部分会发生在数据中心。因此，很有必要简单...

What comes to your mind when we say Genus Layout GUI (Graphical User Interface)? You picture the floorplan filled with instances and objects. Imagine you need to highlight the specific instance or timing path in GUI? Do you think it’s tricky? Not at all!! Genus Synthesis Solution GUI (Graphical...