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Spectre FX Simulator Cuts Intrinsic Semi’s Memory Verification Time by 4X

Intrinsic Semiconductor Technologies, a company transforming the semiconductor industry…

Corporate
• 2 min read
newstory , featured , spectre fx , Instrinsic Semi , verification

Corporate News

Cadence Welcomes ChipStack

ChipStack, a leading startup providing agentic AI solutions for chip verification…

Corporate
• 1 min read
featured , agentic ai , Xcelium Logic Simulator , AI-Driven Verification

SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
• 3 min read
ucie , xcellium , IP , featured , PHY

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

Corporate
• 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium
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Blog - Post List
Latest blogs

Data Center

Cadence Enhances Data Center Digital Twins with NVIDIA Omniverse

Companies across all industries are beginning to harness the power of simulation…

• 2 min read
CFD , featured , data center

Life at Cadence

Mobilizing the Impact of Our "One Team" Culture

Since 2018, Cadence has partnered with Team4Tech to make a mark on the world by connecting…

• 5 min read
team4tech , Cadence Cares , LifeAtCadence

Computational Fluid Dynamics

Last Week at Fidelity CFD

Merry Monday, and welcome to another look back at what we've been up to at Fidelity…

• 3 min read
CFD , turbomachinery , turbulence , Cascade Technologies , CHT , Computational Fluid Dynamics , cadencelive , Mesh Generation , Meshing

Breakfast Bytes

Tensilica for Automotive Radar

At the recent Linley Fall Processor Conference, Cadence's David Bell presented Tailored…

• 2 min read
linley processor conference , ConnX , radar , Tensilica , Breakfast Bytes

System, PCB, & Package Design 

ASCENT: Synchronizing Schematic and Layout Designs

To successfully develop and maintain designs, you need some way to track changes…

• 3 min read
System Capture , 17.4 , schematic layout linking , Layout , 17.4-2019 , PCB design , netlist exchange , ASCENT , design synchronization , Schematic

Life at Cadence

Michigan Electric Boat Is Propelling the Naval Industry

The University of Michigan Electric Boat (UM-EB) is a student team that’s designing…

• 1 min read
CFD , FINE Marine , designed with cadence

Academic Network

Introducing DATE 2023 Young People Programme

The DATE conference , the biggest EDA conference in Europe will be held April 17…

• 4 min read
DATE , Career Fair , PhD Forum , Young People Programme

Breakfast Bytes

Linley: Enabling Heterogeneous Integration of Chiplets Through Advanced Packaging…

At the recent Linley Fall Processor Conference, the first day wrapped up with a presentation…

• 3 min read
packaging , linley processor conference , AMD , 3dhi , 3DIC , xilinx

Computational Fluid Dynamics

FEA or CFD for a Better Thermal Solution Accuracy?

There are multiple instances when FEA tools are compared with CFD. Although both…

• 3 min read
CFD , Conjugate Heat Transfer , Pointwise , Fidelity CFD , engineering , simulation software , Thermal Analysis , Cadence CFD , Meshing , FEA

カスタムIC／ミックスシグナル

Spectre Tech Tips: Spectre Xに移行するには？

Spectre Xへの移行は、シミュレーションの需要や検証タスクの数が飛躍的に増加している時代に、生産性を向上させるための重要な決断となります。昨今、先端ノード…

• less than a min read
spectre aps , Spectre , analog design , japanese blog , spectre x , Spectre X Simulator , verification

System, PCB, & Package Design 

Sigrity and Systems Analysis 2022.1 HF3 Release Now Available

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2022.1 HF3 release is now available…

• 3 min read
Sigrity and Systems Analysis , Clarity 3D Layout , Sigrity XtractIM , Sigrity PowerDC , Clarity 3D Solver , T2B , Clarity 3D Workbench

Breakfast Bytes

Linley: Chiplets for Infrastructure Silicon

At the recent Linley Fall Processor Conference, R. "Suds" Sudhakar of Cisco gave…

• 5 min read
featured , linley processor conference , Cisco , 3DIC , datacenter

Digital Design

How Does Marvell Improve Productivity and TapeOut Time with Automated ECO Implementation…

How to fix the bugs after RTL freeze and perform ECO. Learn how Automated ECO Implementation…

• 3 min read
ECO , Conformal ECO Designer

Breakfast Bytes

Agricultural Equipment for Kids

If you have been reading Breakfast Bytes for a long time, then you will know that…

• 6 min read
agricultural electronics

Breakfast Bytes

Linley Keynote Fall 2022

Last week was the Linley Fall Processor Conference. That still seems to be the name…

• 6 min read
linley processor conference , Linley , techinsights , AI

PCB設計／ICパッケージ設計

2022年10月リリース、OrCAD / Allegro 22.1 の新機能ハイライト

OrCAD® 及び Allegro® 22.1が Cadence Downloads からダウンロード可能になりました。本ブログでは、このリリースにアクセスするための重要なリンクと…

• 1 min read
TopXp , PSpiceA/D , 22.1 , PSPICE , Allegro Pulse , Topology Explorer , Allegro System Capture , japanese blog , Allegro PCB Editor , Pulse , Allegro

Computational Fluid Dynamics

CFD Innovators Digest - Your New CFD Newsletter

The Cadence Fidelity CFD team invites you to subscribe to our updated and consolidated…

• less than a min read
CFD , Pointwise , Computational Fluid Dynamics , NUMECA

Life at Cadence

What Does Cadence Do?

Cadence is a pivotal leader in electronic systems design, building upon more than…

• 3 min read
featured

Breakfast Bytes

EDPS: Transitioning from 5G to 6G

At the recent EDPS, the keynote on the second day was by Mallik Tatipamula. He is…

• 4 min read
5G , Ericsson , EDPS , mobile , 6G
CDNS - Fix Layout Hompage