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Featured

Corporate News

Spectre FX Simulator Cuts Intrinsic Semi’s Memory Verification Time by 4X

Intrinsic Semiconductor Technologies, a company transforming the semiconductor industry…

Corporate
Corporate 11 Nov 2025 • 2 min read
newstory , featured , spectre fx , Instrinsic Semi , verification

Corporate News

Cadence Welcomes ChipStack

ChipStack, a leading startup providing agentic AI solutions for chip verification…

Corporate
Corporate 10 Nov 2025 • 1 min read
featured , agentic ai , Xcelium Logic Simulator , AI-Driven Verification

SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
Arif Khan 7 Nov 2025 • 3 min read
ucie , xcellium , IP , featured , PHY

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

Corporate
Corporate 28 Oct 2025 • 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium
cdns - all_blogs_categories

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  • Data Center 41
  • Digital Design 434
  • Learning and Support 56
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  • SoC and IP 418
  • System, PCB, & Package Design  992
  • Verification 1291
  • Cadence Japan 4

  • CFD(数値流体力学) 45
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  • PCB、IC封装:设计与仿真分析 136
  • PCB解析/ICパッケージ解析 44
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  • RF /マイクロ波設計 44
  • Spotlight Taiwan 61
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  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Life at Cadence

AI-Enabled Data Analytics Is Critical to Semi Revenue Growth and Engineering Pro…

The semiconductor industry has been experiencing strong growth during the past decade…

Venkat Thanvantri 13 Sep 2022 • 5 min read

Life at Cadence

Investing in the Next Generation Today, Pays Dividends Tomorrow

The pace of innovation never slows down, which is why I find it important to pause…

Neil Zaman 13 Sep 2022 • 4 min read

Spotlight Taiwan

CadenceLIVE專題演講精彩回顧: AI驅動的系統設計分析和優化

睽違兩年,CadenceLIVE Taiwan今年在9月1日舉辦,特別邀請Cadence多物理系統分析事業群研發副總裁Ben Gu來台蒞臨盛會,暢談Cadence如何進一步完善智慧系統設計…

candyyu 12 Sep 2022 • less than a min read
CFD , optimality , system analysis , MSA , cadencelive taiwan , McLaren Racing , taiwanese blog , intelligent system design

Spotlight Taiwan

CadenceLIVE Taiwan 2022 驅動智慧系統的新時代!

今年CadenceLIVE Taiwan以多場技術趨勢、創新應用的演講饗宴,分享全流程的EDA設計解決方案,涵蓋從晶片設計、系統封裝設計、物理特性模擬與系統分析解決方案等精彩內容…

candyyu 12 Sep 2022 • less than a min read
5G , cadencelive taiwan , taiwanese blog , intelligent system design , 6G

Breakfast Bytes

HOT CHIPS Day 2: AI...and More Hot Chiplets

My post about the first day of HOT CHIPS appeared yesterday. See HOT CHIPS Day 1…

Paul McLellan 12 Sep 2022 • 7 min read
chiplets , hot chips , AI , hotchips2022

Computational Fluid Dynamics

Construct Unstructured Block Assembly with Fidelity Pointwise

With Fidelity Pointwise, one can skin a block, manually or automatically, using structured…

Veena Parthan 12 Sep 2022 • 3 min read
CFD , block assembly , Meshing Monday , structured blocks , unstructured blocks , engineering , simulation software , Cadence CFD , Meshing , Fidelity Pointwise

Verification

TSN-PTP: A Real-Time Network Clock Synchronizing Protocol

In a network containing multiple nodes, the need for synchronization between the…

Vedansh Seth 11 Sep 2022 • 2 min read
Verification IP , uvm , 5G Network , Ethernet VIP , Functional Verification , Cadence VIP portfolio , VIP , Automotive Ethernet , Ethernet , TSN , PTP , precision timing protocol , verification

Academic Network

Status of Academic Education in 2022

Teaching is easy, teaching with a learning effect is hard Opening statement of a…

Anton Klotz 9 Sep 2022 • 4 min read
Cadence Academic Network , education , Education Kits , GeCon , OrCAD , microwave office

Digital Design

SSV 22.1 Base Release Now Available

The Silicon Signoff and Verification (SSV) 22.1 release is now available for download

SSV Release Team 9 Sep 2022 • 3 min read
Cadence blogs , Voltus IC Power Integrity Solution , 3D-IC , Power Integrity , multi-die design , Timing analysis , Power Analysis , Aging-Aware STA , silicon signoff , Tempus Timing Signoff Solution

Digital Design

Training Insights – Design Robustness Analysis Application: Aging-Aware STA

This blog post describes the phenomenon of Aging, the factors affecting it, and how…

sakshin 9 Sep 2022 • 2 min read
Timing analysis , aging , Liberate , silicon signoff , Tempus Timing Signoff Solution

Breakfast Bytes

The AI Hardware Summit 2022

This year's AI Hardware Summit is coming up next week from 13th to 15th September…

Paul McLellan 9 Sep 2022 • 2 min read
Tensilica , ai hardware summit , AI

Life at Cadence

Lightelligence Powers the Next Generation of Innovations Using Integrity 3D-IC

As an alternative to traditional electronic computing, Lightelligence has come up…

Corporate 8 Sep 2022 • 1 min read
designed with cadence

Breakfast Bytes

Semiconductor 101: New Video

For several years now, I have given a presentation that started off under the name…

Paul McLellan 8 Sep 2022 • 1 min read
eda 101 , semiconductor 101

PCB解析/ICパッケージ解析

Sigrity / Systems Analysis 2022.1 HF2リリース (2022年8月) - 新機能ハイライト

Sigrity & Systems Analysis (SIGRITY/SYSANLS) 2022.1 HF2リリースが Cadence Downloads サイトからダウンロード可能となりました…

SPB Japan 8 Sep 2022 • 3 min read
Sigrity and Systems Analysis , Celsius Thermal Solver , Sigrity XcitePI , system analysis , Sigrity PowerSI , Sigrity Broadband SPICE , Sigrity XtractIM , Sigrity , Sigrity PowerDC , japanese blog , Clarity 3D Solver , T2B , Clarity 3D Workbench , clarity , JAE

Life at Cadence

Formula 1: We Don’t Want Flying Cars - What F1 Teaches Us About Aerodynamics

Formula 1 car design requires extensive analysis of aerodynamics. Computational Fluid…

Corporate 7 Sep 2022 • 5 min read
CFD , F1 , Computational Fluid Dynamics , Aerodynamics

System, PCB, & Package Design 

BoardSurfers: Managing Design Constraints Efficiently Using Constraint Sets

A constraint is a user-defined property, or a rule, applied to a physical object…

Dhruv Prakash 7 Sep 2022 • 4 min read
PCB , 17.4 , BoardSurfers , PCB Editor , Constraint Manager , 17.4-2019 , PCB design , Constraints , Allegro PCB Editor , Constraint Set , Allegro

Breakfast Bytes

Books: Hyperscale and Automotive

I wrote a book! To be more precise, I worked with co-authors to write two books.…

Paul McLellan 7 Sep 2022 • 3 min read
Automotive , featured , hyperscale , book

PCB解析/ICパッケージ解析

System Analysis Knowledge Bytes: Cadence Celsius Thermal Solver: FEAとCFDによる完全な熱ソ…

System Analysis Knowledge Bytesブログシリーズでは、Cadence®が提供するシステム解析ツールの機能と可能性について説明しています…

SPB Japan 7 Sep 2022 • 1 min read
CFD , Celsius Thermal Solver , celsius , thermal management , PDN , Power Dissipation , Thermal Basics , 3DIC , IC package design , Computational Fluid Dynamics , PCB design , japanese blog , FEA

System, PCB, & Package Design 

This Month in IDA

IDA activities in August showcased two video interviews with David Maliniak of Microwaves…

Sherry Hess 6 Sep 2022 • less than a min read
encryption , in-design analysis , optimization , Signal Integrity , electromagnetic , Thermal Analysis , microwave design , multiphysics
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