Artificial Intelligence (AI)

Meet Cadence’s ChipStack AI Super Agent

Vinod Khera — Thu, 05 Nov 2026 07:20:00 GMT

Cadence ChipStack AI Super Agent shifts AI in EDA from helping with individual tasks to coordinating a connected, evidence-driven design-and-verification workflow, with engineers remaining accountable for the final engineering decision. Every stage ...(read more)

Agentic AI for Analog and Custom IC Design

Reela Samuel — Wed, 04 Nov 2026 14:30:00 GMT

Analog IC design and custom IC design remain difficult to automate because circuit behavior depends on interactions among device characteristics, circuit topology, simulation results, and physical layout. Design intent is not always captured fully i...(read more)

Agentic AI for Design Verification and Debug

Vinod Khera — Thu, 29 Oct 2026 05:00:00 GMT

Each new generation in chip design makes chip verification more complex. Today, verification consumes 60-70% of the total engineering hours in chip design. Better methodologies, more automation, and additional compute have helped. Even with tho...(read more)

Who Signs the Tapeout? Ziyad Hanna on AI Chip Design – Wearing Flip-Flops

Corporate — Tue, 27 Oct 2026 18:00:00 GMT

An AI agent writes the RTL, builds the testbench, runs the regressions, and closes coverage. Then an engineer signs the tapeout. What exactly is that engineer signing? Ziyad Hanna, Corporate Vice President of R&D and Strategic Head of AI at Cade...(read more)

fJscaler, GF, and Cadence Collaborate to Scale Optical Interconnects for AI

Corporate — Tue, 27 Oct 2026 17:00:00 GMT

Unified EIC/PIC Co-Design and Strategic Foundry Collaboration Helps fJscaler Develop Advanced Optical Engines for AI Infrastructure fJscaler is named after a unit of energy so small that it takes a quadrillion of them to make a single joule. That is ...(read more)

What Can Agentic AI Super Agents Actually Do for Me?

Reela Samuel — Thu, 22 Oct 2026 17:00:00 GMT

As chip and system designs grow more complex, engineering teams face increasing pressure to meet demanding developmentgoals without a proportional increase in engineering capacity. Time spent coordinating workflows and repeating tasks across design,...(read more)

Accelerating Digital Implementation and Signoff with InnoStack AI Super Agent

Vinod Khera — Thu, 22 Oct 2026 04:30:00 GMT

Modern SoC implementation involves more interdependent trade-offs than teams can explore manually. As chip and system complexity grow, digital implementation closure becomes increasingly difficult to coordinate, since it is rarely achieved through a ...(read more)

Agentic AI for PCB and Advanced Packaging Design

Reela Samuel — Thu, 15 Oct 2026 15:00:00 GMT

As AI workloads grow, more engineering challenges extend beyond the chip itself to the package that brings compute, memory, power, and cooling together. The HBM4 standard is designed to increase memory bandwidth, while evolving stacking requirements...(read more)

How to Verify and Signoff AI-Generated Design Data

Reela Samuel — Wed, 07 Oct 2026 09:35:00 GMT

An agentic AI system can generate and iterate through design changes at a scale and speed that conventional workflows cannot. It can generate RTL, propose an ECO, modify a constraint, create a verification property, or explore an implementation opti...(read more)

Autonomy Levels for Design Agents: L1 to L5 Explained

Vinod Khera — Wed, 23 Sep 2026 06:10:00 GMT

Agentic AI plays an important role in chip and system design, but not every “agentic” capability has the same degree of autonomy. In practice, autonomy is not binary. It is a progression from AI that optimizes bounded engineering tasks to...(read more)

What Agentic AI Actually Does in EDA

Reela Samuel — Wed, 16 Sep 2026 16:25:00 GMT

Electronic design automation (EDA) has always been about turning engineering intent into a sequence of computational operations. An engineer defines a design, establishes constraints, runs analysis, studies the results, makes changes, and runs the t...(read more)

AI-Driven Simulation for Faster and Confident Thermal Design

Veena Parthan — Thu, 03 Sep 2026 06:00:00 GMT

This blog is based on the presentation delivered by Jiwon Yu from Celestica titled ‘ Validating and Accelerating Thermal Design Optimization using AI-Driven Simulation’ at CadenceLIVE Silicon Valley 2026 As thermal architecture grows in ...(read more)

You'll Still Do the Work—You Just Won't Do the Boring Part

Corporate — Mon, 13 Jul 2026 16:00:00 GMT

Agentic AI is about to change your flow. Here's what actually shifts—and why the engineers who move first will pull away from the ones who wait. It's 11 p.m. The overnight regression failed—again—and you're three hours into triaging...(read more)

The Feedback Loop Is the Moat

Hamid Shojaei — Tue, 30 Jun 2026 20:00:00 GMT

Every verification and design team I talk to is building agents right now. The demos are genuinely impressive: point an LLM at some RTL, ask it to write assertions or close coverage or root-cause a failure, and it produces something that looks right....(read more)

The Rise of the Autonomous Engineer

Corporate — Mon, 01 Jun 2026 05:30:00 GMT

Agentic AI in engineering has moved from concept to reality at remarkable speed. What began as isolated AI-assisted workflows is rapidly evolving into fully autonomous systems capable of reasoning, planning, and executing complex engineering tasks. A...(read more)