<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Through-Silicon Vias (TSVs): Interconnect Basics, Design Rules, and Performance</title><link>/cadence_blogs_8/b/corporate-news/posts/through-silicon-vias-tsvs-interconnect-basics-design-rules-and-performance</link><description>Through-silicon vias (TSVs) are one of the foundational enablers of modern three-dimensional integrated circuit (3D-IC) technology, providing vertical interconnects that cut through the silicon to connect stacked dies with short, low-latency signal p</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>