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Jasper User Group 2015, held Oct. 7-8 at Cadence’s San Jose headquarters, brought together top formal verification experts and enthusiasts to share best practices and lessons learned. One such enthusiast was Alex Orr, principal engineer for IC design at Broadcom, who presented, “My First 100 Days in Formal Land.”
A design and verification engineer based in the U.K., with more than 20 years of experience, Orr noted that before he began incorporating formal technologies into his design process a year ago, what he knew of formal was limited to state-space explosions. Today, he is a formal convert.
Orr discussed his first formal verification effort, involving pipeline performance verification. In a pre-formal approach, engineers would use a monitor that would emit an error when performance was lost, or just use an assertion. However, as Orr noted, this is a rather passive approach, where you’re simply proving a negative.
By using formal, “it actually proves that the assertion is correct (or incorrect). That is active, that means your job is done,” he noted. Execution then is far faster, and the assertions live on in simulation.
Channeling The Art of War
Now with a year of formal experience under his belt, Orr quotes Sun Tsu from The Art of War: “The expert in battle seeks his victory from strategic advantage and does not demand it from his men.” Orr’s translation for the formal world: you should have a flow and a methodology that doesn’t require you to have the best engineers….or, you should take all of the bugs out of the equation before you give the design to the engineers!
Orr then shared a few lessons learned and words of wisdom from his experiences so far:
“I’d never used a formal approach 12 months ago and now I can’t imagine a flow without it.,” said Orr. “It’s almost a no-brainer."
P.S. In case you missed it, you can see highlights and photos from Oz Levia's Jasper technology update and vision talk from Day 1 of JUG 2015.