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Christine Young
Christine Young
29 Feb 2016
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Q&A: Software Architect Liron Stoler Discusses Advancements in Verification IP

As designs grow more complex and development cycles get shorter, verification IP has taken on an increasingly critical role in helping engineers meet these challenges. Liron Stoler, a software architect in Cadence’s Verification IP (VIP) R&D team, is very familiar with the ascent of VIP. Based in Petah Tikva, Israel, Liron manages the technologies team of the VIP group at Cadence.

Liron started his career at Verisity, which was acquired by Cadence in 2005. A Cadence employee for more than 10 years, Liron is a graduate of The Academic College of Tel Aviv. We talked recently about challenges and new developments related to VIP. Listen in.

Liron Stoler, Cadence Software ArchitectWhat inspired your interest in an engineering career?

Essentially, it’s about working with very smart people and providing elegant solutions for hard challenges. I think this is my main driver as an engineer. My team is responsible for technologies and methodologies applied in different verification IP. We’re not focused on the implementation of a specific protocol, but, rather, on the set of features that Cadence VIP has, how these features will be implemented in all our models, and how these features are going to be used by our customers.

My team must know the essence of the protocol families: what’s unique in display, in memory, and so on. We must be experts in methodologies. We basically define how verification IP are used in the customer environment. Our main goal is to provide maximum value of the VIP to the VIP customer in the most elegant, efficient, and consistent way.

In your view, how has verification IP evolved over the years? What are some important milestones in the development of this technology?

In the beginning, Cadence had mostly assertion-based VIP. At that time, Verisity developed e-based VIP (a.k.a. eVCs). After the Verisity acquisition, Cadence became a significant player in the VIP market. Around 2005, SystemVerilog emerged. A couple of years later, Cadence and Mentor came up with a SystemVerilog-based methodology for verification called OVM, which later was accepted as a worldwide standard with the name UVM. In 2010, Cadence acquired Denali and became a leader in the VIP market. We adopted the VIP architecture of Denali, and improved it to support perfectly all of our VIP models. Using the new architecture, we’ve provided users with various API languages and verification methodologies to access all our VIP. Nowadays most customers are using UVM and SystemVerilog user interfaces to access any of our VIP cores.

What are some of the key challenges in creating good verification IP?

We have over 150 models—different protocols, different protocol families, cores written in different languages for different purposes, some for simulation, some for acceleration. The main challenge is creating an architecture that will support any type of model and that will work efficiently and elegantly for all the different VIPs. Also, we must provide a consistent user interface and methodology for all these different types of protocols.

What do customers want most from verification IP? And how are we meeting these needs?

They want VIP to be mature, they want it to work, and they want it to work well. They want it to follow the specification accurately. Next in importance are ease of use, consistency, and having good support. We are meeting these needs very well, with proven and mature models used in thousands of verification projects, we have consistent and well defined APIs that enable quick adoption and flexible use of our VIP, and we’ve developed an excellent protocol debugging application (working on top of Indago Debug Platform) that lets users visualize very clearly what happens in simulation and debug it post simulation.

Designs continue to get smaller and more complex. New materials and techniques are being used. How does this impact how we develop our verification IP?

Because the designs are more complex and use more standard interfaces, a single chip now has tens or more instances of standard interfaces. To really work with it, our customers require modern verification methodology, API and capabilities, and that has moved us to develop and make sure we support all these capabilities and ensure that we keep our UI and methodology up to date.

People that work on integrating systems aren’t necessarily protocol experts. They buy verification IP to save time. They need tools for easy debugging, and the Indago Protocol Debug App is one of them. They also need power tools to reach their verification goals more quickly, so we have TripleCheck, a compliance solution that provides predefined test suites and verification goals delivered to an executable verification plan.

What are some interesting emerging developments in the world of verification IP?

Maybe the most exciting thing that’s happening right now is the development of graphical protocol debugging applications, I think we have a great solution in the Indago Protocol Debug App. This is a relatively new development that brings all the protocol knowledge in a graphical way to the customer—to the expert customer and to the customer who is not such an expert in the protocol—to help them understand and debug what is happening in their simulation.

When you’re not addressing the challenges of VIP, what do you like to do for fun?

I like to hang out with family, friends. I enjoy doing some carpentry work, drawing, gardening, cycling, jogging, and so on.

Christine Young

Tags:
  • Verification IP |
  • debug |
  • VIP |

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