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It’s hard to get out of the office, but events are where a lot of great technology conversations get started. Fortunately one of the best parts of our job is getting out and covering these events. Here’s what Cadence bloggers have seen so far this year.
Consumer Electronics Show
It’s mammoth, it’s in Las Vegas, and it’s the biggest technology headline of every new year. This year, Cadence’s IP team again descended on the desert to show off an array of IP technology. We learned about:
The year really starts for semiconductors and EDA with DesignCon, a target-rich venue for the latest technology conversations. This year, we:
Cadence Technology Summits
During the fall of every year, we line up domain experts from Cadence and its partners to tackle the big hairy questions in various areas, such as front-end design, low-power, and analog and mixed-signal design.
Richard Goering reported on how to get the best results from physical synthesis and how to avoid routing congestion with high-level synthesis from the Front-End Design Summit. Here’s my wrap-up and links to the presentations.
From the Low-Power Technology Summit, we heard about why Cadence has a passion from power, what an expert panel thinks are the most pressing low-power design issues of our time, and how engineering teams should be optimizing for power in advanced wireless systems.
So, that was then. What lies ahead?
Embedded World, Feb. 24-26, Nuremberg, Germany, and Mobile World Congress, March 2-5, Barcelona, Spain
Cadence will be there in force demonstrating an array of audio and video IP as well as verification and other EDA tools solutions. I'll be attending and reporting from those events, so watch this space for dispatches.
DVCon, March 2-5, San Jose, Calif.
DVCon is the premier conference for IC design and verification engineers. This year’s conference focuses on topics including system-level design, system-on-chip (SoC) verification and validation, IP reuse, mixed-signal design and verification, and low-power design and verification. Goering, who will cover DVCon, gives us an overview.
CDNLive Silicon Valley, March 10-11, Santa Clara, Calif.
Cadence’s biggest user event of the year—don't forget to register! We’ll cover keynotes and select technical sessions on the blog pages and we’ll also live-blog Day 1, where some big surprises are in store. For attendees, expect a packed schedule with sessions on IP, verification, implementation, and more.
And that’s not even bringing up the subject of the 2015 Design Automation Conference. Hopefully we’ll catch a breather before then!