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The first P in PPA (power, performance, and area) was on full display at the recent Cadence Low-Power Technology Summit, where presenters from places as Stanford, Broadcom, Spansion, and ARM offered insight into low-power designs. The day-long event matched design engineers with technology experts who surveyed the myriad challenges and opportunities that low-power design brings today.
Cadence's Director of Low-Power Solutions Marketing Krishna Balachandran, who helped organize the event, said:
“Our speakers offered up great insights in areas ranging from the latest trends in low-power design in the IoT, wearables, and automotive markets to usage of EDA tools and power formats to successfully design and verify their cutting-edge designs. The audience—more than 150 strong—in many ways made the event by peppering the presenters with a number of interesting and provocative questions.”
What follows is a rundown of the day's presentations with links to their video presentations and supporting materials:
Elad Alon, a professor from UC Berkeley, kicked things off by emphasizing that the little things matter in low-power design, and that engineering teams need to think about the system as a whole. Here is a video of his session, “Realizing Energy-Efficient SoCs Requires Vertically-Integrated Design(ers),” complete with accompanying slides. Here is a link directly to his presentation.
(Note that all presentation links require a Cadence.com login; register now if you’re not already a member of our community.)
Cadence Vice President of R&D Paul Cunningham next offered a technical roadmap for low power among Cadence offerings, from EDI and Tempus, through to the Xtensa processor core, to Voltus and more. Here’s a link to Cunningham’s video presentation and a link to his slides.
Low-power design is clearly key for Internet of Things (IoT) applications, and ARM Fellow David Flynn outlined challenges in his video and presentation. David Simon (pictured right), Vice President of Strategy and IP Management at CSR (formerly Cambridge Silicon Radio) walked the audience through the low-power design challenges inherent in various wireless applications and protocols (video and presentation).
In a provocative presentation, Kenneth Wagner, vice president of the Communications Products Division of PMC Sierra, described potential minefields (and safe pathways through those minefields) with power estimation, an “evolving science” that he said “can make or break approval for development of a product” (video and presentation).
IEEE 1801, the Unified Power Format, (UPF) is a relatively new and evolving standard. John Redmond, associate technical director with Broadcom’s Connectivity Group, described how to thrive in a multi-vendor UPF flow (video and presentation).
Dinraj Shetty, vice president of engineering with Spansion, wrapped up the day’s presentations with a look into unified power-intent-driven process flows for low-power MCU-based designs (video and presentation).
Rounding out the event was our panel (L-R pictured nearby: Elad Alon, David Flynn, John Redmond, and Kenneth Wagner) on low-power design issues, which Richard Goering has written about. To see the video of the lively give-and-take, click here.
Here’s the link to the main Low-Power Technology Summit archives page.
- Panel: Engineers Debate Progress of Low-Power Design