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With all of the momentum around the OVM these days there has been a lot of good discussion about testbench methodology. The OVM provides a great methodology framework for building modular, reusable verification environments, but there is more needed to get the full value of adopting an HVL like SystemVerilog or e.I have seen a lot of people adopt an HVL and continue doing directed testing -- that leads to a whole lot of work to learn a new language without getting a good return on your investment.The real value of SystemVerilog and e is in enabling a Coverage Driven Verification Methodology which is a much more scalable, automated approach to verification. At Cadence, we have developed a Metric-Driven Verification (MDV) Methodology on top of the OVM to help customers move from directed testing to a coverage driven approach so that they can get the full value out of adopting an HVL. Just like OVM provides a structured, cookbook approach to building verification environments, MDV provides a structured, cookbook approach to take full advantage of constrained-random stimulus generation, move from using test metrics to coverage metrics, and manage the large amounts of failure and coverage data that is generated by these types of automated verification environments.Just this past week, we announced significant new advancements to our Metric Driven Verification Solution.
More details to follow...