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As part of Cadence's commitment to
support IEEE 1647 e, Team Specman is launching this blog to serve
up technical tips, tricks, examples, and observations about developments in
IEEE 1647 "e" language-related technologies,
methodologies, Specman core engines, and the language itself.
We intend to make this blog VERY
technical; including code examples in as many posts as possible.
Additionally, we will be inviting "guest bloggers" from Specman
R&D to give you some peaks at what goes on under-the-hood, as well as
Application Engineers from the Cadence Field organization to share what new
trends that are seeing in their territories.
But what if you aren't an e/Specman
user, and you even have "SystemVerilog Forever!" tattooed on
your arm? That's OK -- Team Specman welcomes you to this blog as well,
and we suspect you will find a home here. Why? Because in many
cases the issues that this blog will be addressing are universal to functional
verification, and thus seeing the e/Specman approach to a given
verification challenge can inspire thoughts about how you might to tackle a
given problem with other languages/methodologies. (Seriously: where do
you think the OVM SystemVerilog team got the idea for "sequences" -- e/eRM!)
Our intention is to complement all of the other fine online e
language & Specman-related resources, such as:
* The venerable Specman Yahoo group
* The IEEE 1647 Working Group
* The Cadence Functional Verification
as well as other sites that often touch
on e & Specman issues, such as:
JL Gray's "Cool Verification"
* Avidan Efody's "Specman
* Yaron Ilani's "Think
Finally, please feel free to contact us
with any questions you have, and/or topics you would like to see us cover.