Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Part one of this blog looked at what I think are three questionable claims about the EDA industry – that electronics OEMs are going back to internal tool development, that foundries will buy EDA vendors, and that designers aren’t moving to lower process nodes. But whatever the truth of those statements, the EDA industry does face some real challenges. Part two of this blog lists five of them – and notes that opportunity lies behind the challenges.
Embedded software has become the key differentiator for many electronic products, and
the EDA industry historically hasn’t addressed embedded software.
Many products these days – the Apple iPhone being one example – are differentiated primarily through their software content rather than by custom chip design. Embedded software development has become the key bottleneck in many product development efforts. EDA vendors haven’t addressed the embedded software market largely because compilers, debuggers and real-time operating systems (RTOSes) are typically cheap or free. But EDA vendors are deriving value by providing environments for hardware-aware embedded software development. This can happen through virtual platforms as well as emulation systems like the Cadence Palladium series.
Challenge #2:ASIC design starts are shrinking, FPGA design starts are growing, and FPGA tools are traditionally cheap or free.
Gartner Dataquest reported earlier this week at ASIC design starts are expected to drop by 22 percent in 2009. Moreover, FPGAs supposedly have a 30-1 edge in design starts. This is not good news for an industry that derives far more revenues from ASIC tools than FPGA tools.
The challenge is mitigated, however, by the increasing complexity of the ASIC designs that are starting up, which calls for better design and verification tools. Further, EDA revenues aren’t solely tied to ASICs – analog/custom design has become a major area of focus, for example. And complex FPGA design is looking more and more like ASIC design on the front end, and is requiring sophisticated tools. Consequently, EDA vendors are paying more attention to the FPGA design market.
Challenge #3:New business models like Software as a Service
(SaaS) potentially challenge EDA vendor revenues.
I’ll have more to say about Software as a Service in future blogs; it’s become an interesting topic of late. The basic idea is that customers access EDA software only when they need it, most likely through a web browser. Cadence introduced a suite of SaaS “Hosted Design Solutions” in September 2008.
A DVCon panel discussion explored the pros and cons of SaaS, and you can read about the discussion in a three-part Cadence Community blog from Joseph Hupcey III. As noted in these blogs, technical challenges include bandwidth and the encryption of design data. The economic challenge is to position SaaS so it increases EDA tool availability without sacrificing EDA revenues or profits. I believe that can be done.
Ratable licenses provide predictable income,
but the transition can be painful.
With ratable licenses, revenue is recognized over the term of the license. This puts EDA companies on a more solid long-term financial footing, but transitioning to ratable licenses impacts short-term revenues. Cadence is currently transitioning to a 90 percent ratable license mix.
We’re in a really deep recession, folks.
This is perhaps the main point that EDA naysayers should remember. We used to think of EDA as fairly recession-proof, but there are few if any safe havens in the current downturn. EDA customers are starting fewer projects, cutting R&D expenditures, and putting more pressure on suppliers to reduce costs. Less venture capital is available for startups. A 10.9 percent revenue decline in this recession does not spell the death of an industry – many industries are doing far worse. So far, the EDA industry is holding up a lot better than most people’s retirement portfolios.
One point made at the DVCon “EDA dead or alive” panel is that EDA will die only when people stop designing chips and electronic products, which will happen only when people stop buying those products. I just bought an MP3 player last week. Count me among the optimists.
Great insights, Mr. Goering. When I read part I yesterday, the first thing I thought was: even if Moore's Law does hit a ceiling, like processor speed did a few years ago, chip designers and manufacturers will still jump into new areas with new challenges. EDA tool designers are going to have lots of problems to solve for a very long time.
I also wanted to mention that there is a large EDA vendor who has had an embedded software division for years. Self-interest forbids me from naming them, but the company name starts with an "M" and it isn't Magma.