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What do you do if your revenues decline nearly 60 percent in the space of two quarters? If you’re TSMC, you hire more R&D people, expand your focus beyond conventional SoCs, and work to innovate your way out of the recession.
TSMC’s “can do” attitude was reflected Tuesday (April 21) at the company’s North American Technology Symposium in San Jose, Calif. Here, an overflow crowd – itself a positive indication – listened to presentations from several TSMC executives along with a keynote from EDA pioneer Alberto Sangiovanni-Vincentelli, professor at the University of California at Berkeley and a Cadence board member.
Rick Tsai, TSMC president and CEO, told it like it is. “This recession is bad,” he said. “Our fourth quarter revenues dropped 30 percent quarter-to-quarter, and in the first quarter, revenue dropped another 30 percent quarter-to-quarter. So from the end of the third quarter of last year to the end of the first quarter of this year, TSMC revenue dropped by roughly 60 percent. I know many of you are suffering, but I think this is worse.”
Although TSMC “cut every expense we can think of,” those cuts did not apply to engineering. In fact, Tsai said, TSMC plans to increase its current staff of 1,200 R&D engineers by 30 percent this year, and to increase its current staff of 600 design technology engineers by 15 percent.
“We need to innovate our way out of the recession,” Tsai said. “We need to invest for the future.” One way to do this, he said, is through deeper collaborations with partners, including EDA and silicon IP vendors, so as to avoid duplication of efforts and to make the best use of limited resources.
While TSMC is continuing its development of 28 nm and below process nodes, it’s not putting all its eggs in one basket. “We really want to put effort into mainstream technologies,” Tsai said, “and do more with analog, power management, and MEMS. We are also investing in SiP [silicon in package] and through-silicon vias.”
Jack Sun, TSMC vice-president of R&D, gave further insights into the new technologies TSMC is developing. He noted that strained silicon, high-K metal gates, FinFETs, and high-mobility channels can keep power density manageable and reduce variations. He spoke of TSMC’s “next-generation lithography” roadmap. For 22 nm and below, TSMC is looking at double-patterning, which will require restricted design rules. But he also said TSMC has made “tremendous progress” with extreme ultraviolet (EUV), and is also working on multiple e-beam “maskless” lithography. The idea here is that a cluster of 10 machines, each of which writes 10 wafers per hour, can put out 100 wafers per hour while taking up the same footprint as an immersion tool.
Sun also mentioned TSMC’s interest in analog and RF design. At the Symposium, TSMC and Cadence announced a mixed-signal/RF reference design kit for 65 nm technology. TSMC separately announced an integrated signoff flow with EDA and IP partners, including Cadence, for 65 nm ICs.
What caught my attention the most, however, was Sun’s discussion of technologies that go beyond conventional SoC design. He talked about TSMC’s work with 3D ICs, noting that the first applications may involve stacked DRAM with logic chips. TSMC expects to have a 300 mm through-silicon via (TSV) R&D pilot line in the third quarter of 2009. Sun also talked about TSMC’s work with backside illumination (BSI) technology for CMOS image sensors, MEMS research, and “green” packaging with fine-pitch bumps.
Several TSMC executives talked about “more than Moore.” The Sangiovanni-Vincentelli presentation went way beyond even that with a discussion of cross-domain collaboration that spanned such topics as energy-efficient building design, sensors in tires, and synthetic biology. The latter field seeks to use a structured, CAD-like methodology to create new biological organisms. Ten years from now, Sangiovanni-Vincentelli predicted, TSMC might be talking about a new manufacturing line that produces…synthetic bacteria.
That’s the thing about boosting R&D and exploring new horizons. You never know where it will lead.