Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Mark Gogolewski was a
co-founder, CTO, and CFO of Denali Software
prior to that company's recent
acquisition by Cadence. He is now vice president of R&D of the Front
End Group at Cadence. In this interview, he talks about Denali's
history, trends in IP and memory modeling, EDA360, and the strategic value of
Q: Mark, you were one
of four co-founders of Denali in 1996. What
was the original idea behind the company?
A: The original motivation of what came to be known as Denali was to come up with solutions for the
hardware/software co-design and co-verification problem. We reached the
conclusion that the problem was huge, and beyond the scope of where we were
ready to go. We then identified memories as a ubiquitous hardware component,
and also one of the key components that software required. It seemed like a
good problem to start with. We thought we could make money from memory models,
and we were naïve about it, but our enthusiasm went into making it a success.
started with memory models, but you also had design IP and verification IP
solutions. How did these come about?
A: The second product we really stuck with was DDR
controller IP. Basically, our interest in this IP was that customers were
struggling to optimize this interface, due to the rapid pace of change in the
technology. Devices were getting more complex, and sharing the bandwidth inside
the chip was getting more complex because there were more clients to serve. We
could see that a lot of effort was going into this area.
We started on the DDR controller IP in 2000 and then added
PCI Express VIP [verification IP] in 2004. This was a huge change for us. Prior
to this we had focused on enabling memory technology. But we had heard an
earful from one of our largest customers about how much of an impact PCI
Express would have. We were looking for other opportunities, and we believed we
could leverage a lot of the investment we had made in memory models, where we
had built significant core library technology.
also developed a register specification tool called Blueprint. How did that
A: Registers are a key component accessed by hardware and
software, and there's interaction with the hardware by firmware and software.
Registers are ubiquitous and they pose an information management challenge. The
idea that you could consolidate on language and automatically generate all the
views you needed sounded pretty compelling.
Q: Another thing Denali is well known for is its annual Design Automation
Conference party. How did that get started?
A: The original genesis was that Sanjay [Srivastava] and I
wanted to get the Denali name out. We were
younger and more spirited in those days, so throwing a party seemed like a fun
way to accomplish the goal. One of the key components of our modeling
verification technology was our partnerships in simulation. So, we had a lot of
[EDA] relationships. We invited not only our customers but also all of our
partners. That's part of what made it a draw and why the first one - 1999, I
think - turned out to be a bigger success than we expected.
Q: There are a number
of IP and VIP providers today. What was distinctive about Denali
A: We focused very strongly on quality. Quality means that
it worked, and it worked very well. Also, from the beginning, we realized that
the DDR controller you would put into a supercomputer versus a printer or cell
phone would be very different. So from the beginning, part of our technical
differentiation was configurability. We could work with customers and
understand their specific requirements, turn that into a machine-readable specification,
and automatically generate optimized IP, verify and run synthesis.
Q: What trends do you
see occurring in the IP market?
A: We've seen a real sea change in the past few years. When
we first came out with our DDR controller, IP was a "make unless you need to
buy" situation for our customers. Since then there's been a shift to "buy
unless you need to make." It is expensive and complicated and time consuming to
create any intellectual property. If it's not differentiating, it makes a lot
more sense to go with a third-party solution.
Q: There's been a lot
of talk about the high cost of IP integration. Studies have shown that it may
cost more to integrate IP than to buy it in the first place. Were you seeing
that trend among Denali customers?
A: We've absolutely seen that. As much as we've worked hard
to minimize the pain our customers feel after they've acquired IP, we recognize
that making sure it works as needed by the system is an incredible challenge
and expense. That's especially true if you start looking at all the firmware
implications. It's a frightening trend for the industry in terms of cost. And
this is one place where I really applaud the leadership Cadence is showing with
Q: That leads right
into my next question. How do you think Denali
technology fits into the EDA360 vision?
A: First of all, our products clearly drop right into SoC
Realization. Customers need to acquire high-quality, high-performance IP and
they need to integrate it into SoCs quickly and optimally. When you talk about
application-driven design, optimizing memory bandwidth to optimize the specific
needs of software has to be a key element of the overall solution. We are
hoping that all of our technology, and especially the memory related technology,
will fit well and make a significant impact on System Realization. EDA360 should radically change the cost
structure of the industry.
Q: What's the
strategic value of the acquisition, for both Cadence and Denali?
A: For Denali, being
acquired by Cadence gives us access to a world-class channel, and an
opportunity to integrate and optimize our IP products with a much broader
technology platform. At Denali, we only had the opportunities afforded to us by
our size and product set.
I believe the EDA360 vision is targeted right where the
industry needs to change. I respect the decision by Cadence to deliver IP that
it owns as well as IP it partners with. For Cadence, this will fit very well
into the EDA360 vision. Clearly what Cadence is doing is much bigger than Denali, but I think we play an important part. I think we
can help with a broad range of interfaces, blocks, technologies, and tools that
Q: And finally, what
are you working on right now?
A: Right now I'm working really hard to get to know the
[Cadence] staff. I'm very excited and focused on making sure the integration