Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
The 2004 Mars Rover mission is one of the great
engineering triumphs of our time. So when the Silicon
Valley DVClub brought in a
NASA speaker for its quarterly lunch meeting, I knew it would be inspiring. And
it was -- even though it illustrated how different NASA's engineering effort was
from contemporary chip design.
DVClub, co-sponsored by Cadence, offers quarterly meetings
for IC verification professionals in Silicon Valley
and seven other locations. Michael Sims, research scientist at NASA Ames Research Center,
spoke on "The Life and Times of the Mars Exploration Rovers" at the Aug.
12 DVClub meeting in Silicon Valley. Sims
is the uplink lead for most of the rovers' cameras and is project lead for long
term planning for the mission.
You probably know that the Spirit and Opportunity
rovers, originally designed for 90-day missions, are still trudging along the
sands of Mars after six and a half years. And yet, these rovers were designed
manually, using techniques that Sims said were from the "pre-1980's era" in
comparison to automated VLSI design. They were mostly built from proven,
off-the shelf components, including an already-obsolete PowerPC processor. Verification
consisted of building a physical prototype and watching it make its way over
rocks and sand.
Not on the Leading
I already knew that NASA takes an extremely conservative
approach to engineering, preferring tried-and-true technologies over anything
close to the leading edge. In 2004 I wrote
an article about a full-custom CCD imaging chip designed for the rovers. The
chip designers faced some unique challenges, but the chip itself wasn't particularly
new technology. The rovers use 1 megapixel black and white cameras augmented by
The primary criterion for getting a project accepted at
NASA, Sims said, is that "you have to argue it's a safe, viable, doable
mission. That means we've done this before." So the rover team argued that
their project would be just like the 1997 Mars Pathfinder rover, only without a
lander, and would use the same PowerPC processor.
It turned out that the processor is much too slow to detect
obstacles in the path of the rovers, so "we close our eyes and walk," Sims
said. When the rovers get stuck, they spin wheels and slowly dig their way out.
Spirit, however, is currently stuck in the sand for the duration of the Martian
The rovers are programmed daily in what is "effectively"
assembly language, Sims said. How is the code verified? By getting a roomful of
people to look through it. "Reliability comes from throwing more people at it,"
he said. "Again, this is a good analogy to VLSI design in the 1970s."
Cause for Inspiration
And yet, and yet...those Mars rovers have done some stunning
science and have lasted far longer than anyone expected. This project could
have succeeded only with fantastic teamwork and dedication on the part of the
engineers and programmers over a period of many
years. There were many creative, ingenuous solutions to unique problems, such as 200-degree temperature variations between night and day.
And I think that's the takeaway for the attendees at DVClub.
You can't design a competitive consumer product the way the Mars rovers were
designed. But if you apply the same spirit of teamwork and creativity, and combine
that with up-to-date design and verification methodologies and tools, you can go a
long, long ways.
Nice post Richard! When Michael Sims talked last week about teams hand walking through code written to drive the rovers' next excursion, I had flashbacks of teams spreading chip plots on the floor of a cafeteria or other big room, looking for missing polygons and design-rule errors on giant sheets of plotter paper taped together. We've come a long, long way in EDA since then!