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Optimized EDA reference flows for new processors typically aren't available when early adopters start their designs. ARM decided to do something different with its recent Cortex-A15 MPCore processor, and engage in an unusually early collaboration with Cadence that will be described at next week's ARM Technology Conference (ARM TechCon).
ARM announced the Cortex-A15 in September. ARM calls it "the highest-performance licensable processor the industry has ever seen." Claiming a 5X performance increase over today's smartphone processors, within a comparable energy footprint, this multi-core device runs up to 2.5 GHz and is aimed at 32/28nm and below process nodes.
In late September, Cadence announced an extremely early collaboration with ARM to develop a methodology for customers seeking early access to the Cortex-A15. This collaboration will be further discussed at a joint Cadence-ARM session at the ARM TechCon Nov. 9 in Santa Clara, Calif. To get some background, I talked to Susan Runowicz-Smith, group marketing director for the ARM and IBM alliances.
Alpha and Beta
Susan said that Cadence was invited to work with ARM during the "alpha" stage, while RTL coding is still ongoing. "We made a commitment to work on site with ARM, and provide feedback to them based on the things we learned," she said. "This is something we haven't done before. Usually we don't get code until the beta stage, where RTL is pretty much fixed." As a result, reference methodologies have generally not been available until after new processor cores go into production.
Another unusual aspect of the collaboration was its depth. Over 20 Cadence engineers contributed to this activity, which included weekly meetings with ARM that discussed ways of improving design implementation. "It gave us the opportunity to get more feedback on our tools than we've been able to get before, and it helped us improve the way we do high-performance design," Susan said.
Because of this early knowledge, Cadence was able to support Texas Instruments, the first company to license the Cortex-A15. (The Cadence press release includes a quote from the director of OMAP IC development at TI, who noted that "we appreciate Cadence's early commitment to the development of ARM's Cortex-A15 MP processor...as the first company to license ARM's new processor, TI will rely on its EDA partners to be fully ramped as well.")
The net result, Susan said, is that "we will be in very good shape" with an optimized reference flow when full production begins around the first of the year. The word "optimized" is key. The reference flow targets high performance, and it includes not only tools but also scripts that will help users get the best possible results.
ARM TechCon Presentation
The ARM TechCon presentation is entitled "Keys to Silicon Realization of Gigahertz Performance and Lower Power ARM Cortex-A15." It will be held Tuesday, Nov. 9 at 10:30 a.m. The session will teach attendees how to implement configurations of this multi-core processor that deliver gigahertz performance while limiting power.
Registration information for ARM TechCon is available here.
You can read about the specs for the Cortex-A15 here. Whether or not you're actively considering using this processor, prepare to be impressed. The Cortex-A15 could have a major impact on mobile, consumer, and infrastructure applications.