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Do you design or program systems-on-chip using ARM processors - or plan to? If so, ARM TechCon is the place to be Oct. 25-27, 2011. Cadence is the official "signature sponsor" of this year's conference and has a number of papers and activities there. I'll first provide a general overview of the conference and then list some of the Cadence-specific presentations and events.
ARM TechCon actually includes two conferences - a Chip Design Conference Oct. 25, and Software & Systems Design Conference Oct. 26-27. The Chip Design Conference provides technical presentations and exhibits for chip design teams working with ARM silicon IP and tools. The Software & Systems Design Conference provides courses and exhibits for system developers. Here are some more specifics:
Chip Design Conference - Tuesday Oct. 25
Software & Systems Design Conference - Wed. and Thurs., Oct. 26-27
Cadence Presentations and Events - Chip Design Conference
In his Industry Address, Chi-Ping Hsu will discuss the collaborative ecosystem that's needed for complex designs at 32nm, 28nm, and 20nm, and show how Cadence and ARM are working together to help bring advanced-node, cutting-edge designs to market more efficiently.
Paper presentations will occur after the Industry Address, and the following papers have Cadence authors or co-authors. Clicking on the links will bring you to the abstracts.
Cadence and ARM will co-present a sponsored session Tuesday at 2:00 pm titled "Unified Flow for Mixed-Signal Design with an Embedded Cortex-M0." The session will note the challenges of mixed-signal design with microcontrollers, and present a flow that integrates analog and digital design leveraging the OpenAccess database.
Additionally, demonstrations at the Cadence booth (#29) will feature design IP for memory; Silicon Realization for low-power and GHZ+ ARM processors; an optimized ARM implementation methodology for ARM IP; and clock concurrent optimization for Cortex-A9 based design.
Cadence Presentations and Events - Software & Systems Design Conference
Cadence will exhibit in booth #500 and will demonstrate the Rapid Prototyping Platform, Virtual System Platform, and Verification IP catalog. ARM will also demonstrate the Cadence Virtual System Platform in its booth (#300).
Wednesday at 3:30 pm, Cadence will offer a sponsored session titled "Verifying your ACE-based SoC: Will Tried and True Methods Hold Up?" This session will review the challenges of verifying cache-coherent SoCs employing the new AMBA 4 ACE protocol, and discuss the role of verification IP.
The following Cadence paper will be presented Thursday:
[ATC-302] Thursday 11:00am: Creation and Usage of SystemC Virtual Platforms for Multi-Core System Debugging and Analysis
More information about Cadence activities at ARM TechCon is available here. For further conference information and registration, see the conference web site.