Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
The world's largest foundry provider, TSMC, is confident it can keep up with the semiconductor scaling predicted by Moore's Law and can even outpace Moore's Law through 2.5D and 3D-ICs. It's all part of the "incredible high-tech future" predicted by Rick Cassidy, president of TSMC North America, in a keynote speech at CDNLive! Silicon Valley (Cadence user conference) March 13, 2012.
Cassidy's speech, "Living in the Silicon Century," followed an earlier keynote by Lip-Bu Tan, Cadence president and CEO (read report here) and preceded a third keynote by Tom Lantzsch, executive vice president of corporate development at ARM (read report here). All of the keynotes emphasized the need for close and early collaboration to solve the challenges of advanced process nodes.
Cassidy began his talk with a look at the technology that flourished after the invention of the first IC in 1959. He noted how business models transitioned from a very integrated IDM approach in the 1970s, to the advent of EDA in the 1980s, the emergence of the fabless model in the 1990s, and the current "fabless plus" model that includes EDA, IP and services.
"I think we're at the beginning of what is going to be an even more spectacular ride than where we came from," Cassidy said. He noted that the semiconductor industry has perpetuated an "inside out" business model. "This is the only industry I know of where you make things that are smaller, perform better, have more functionality, and yet it costs less. This business model creates an elastic opportunity which is explosive."
Moore's Law and Beyond
TSMC is gearing up for the second half of the silicon century, Cassidy said. He noted that some 850 engineers are working on design technology platform capabilities, and that another 3,000-plus engineers are working in R&D. "That's 3,000-plus engineers who stand behind the concept of the [TSMC] Open Integration Platform," he said. Beyond that, he noted, is an IP alliance driven by tens of thousands of engineers.
"We don't see an end to Moore's Law," Cassidy said. "We are working at 14nm, 10nm and beyond with lots of innovations. I think we can actually beat Moore's Law." He spoke of the 12" wafer "gigafabs" that TSMC is building, and that are already cranking out more than 100,000 wafers per month. He also said that TSMC has invested $13 billion between this year and last year, and 80% of that has gone into building 28nm and 20nm capacity. "We have the capacity in place to serve your needs," he said.
There is an opportunity to "outpace" Moore's Law, he said, through 3D-ICs as well as "2.5D ICs" using silicon interposers. "It really perpetuates the scaling opportunity, and if you think about it, there's a great deal the system designer can do while architecting new products, with different ways to solve problems."
Cassidy added that "we've been working with Cadence, and the nice thing is that 3D-IC solutions are available on Reference flow 12.0. Cadence has done a really nice job for us. They won the Physical Implementation award at the 2011 OIP Forum." Another example of collaboration is the work that Cadence, ARM and TSMC did on the first 20nm ARM Cortex-A15 tapeout, which Cassidy hailed as "absolutely outstanding work."
Daunting Challenges, Deep Collaboration
But the high-tech future Cassidy envisions won't come easily. "The problems are daunting and they're going to be hard to solve," he said. "Deep partnership with folks like Cadence sits at the heart of what we need to do." He pointed to design for manufacturing (DFM) as one area where Cadence and TSMC have worked closely together.
Cassidy called on audience members to interact with Cadence and other partners on the R&D side. "If we don't understand one another's challenges we don't be able to solve them," he said. "Engineers solve problems, but they're becoming far more complex than anything we've seen before."
Closing remark: "The pace of change is accelerating and what you're doing is making that happen. We've got the canvas, we've got the paint and the paintbrushes, and you have the artistic and creative talent that will drive products out there that will transform the way the world works." Cassidy added, however, that "I can't iterate enough how important close collaboration is for success, and how it has to happen earlier with each generation."
Other CDNLive! 2012 Keynote Blog Posts:
CDNLive! - Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers
CDNLive! Keynote - New Horizons for ARM based SoCs