Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
AMD has been using emulation for IC design for many years, but engineers there have recently found two new ways to use this versatile technology. At a recorded Cadence Theater presentation at the 2013 Design Automation Conference, Alex Starr, AMD Fellow, showed how an increasing need for early software development has led to two new usage models for the Cadence Palladium emulation system.
The presentation is titled "Complementing In-Circuit Emulation with Virtualization for Improved Efficiency, Debug Productivity and Performance." As Starr explained, in-circuit emulation - the traditional way to use hardware emulation - uses "real" targets such as disk drives that hook up to the emulator with cables. He presented two alternatives that use "virtual" targets:
This is not to say that in-circuit emulation is going to be replaced. Indeed, Starr said it will remain the "bread and butter" of emulation for many years. "You have real devices that run at speed, you have real device stimulus, and you have real traffic conditions," he noted in the presentation. "It really ensures that your devices work with your designs."
Making Emulation More Efficient
However, the need for more efficiency led AMD to look for other ways to utilize its emulation platforms. As early software development becomes more and more important, Starr said, more demands are placed on emulation systems. Another driving force is shrinking time-to-market. Engineers have a limited amount of time in which they can use emulators.
In-circuit emulation has some challenges, Starr said. Target availability is one of them. Certain targets are attached to certain boards on certain emulators, and you might not be able to get time on the one emulator that has the configuration you need. Replicating the same target configuration on a number of different emulators would be expensive. Also, save and restore is very difficult with physical targets. If it takes 50 hours to boot an OS (not an exaggeration), you'd like to be able to save that state and go on from there.
The first alternative Starr presented is embedded target emulation. Instead of hooking up a physical disk drive, you would take something like a SATA hard disk accelerated VIP model and run that inside the emulator. This setup can be relocated to a different emulator without having to physically move a disk drive. Further, with all functionality inside the emulator, save and restore is usable.
The second alternative is virtual platform co-emulation, the "hybrid" mode that combines virtual platforms with emulation. Here, C/C++ code is connected to the emulated portions of the design through transactors. Starr said AMD is seeing a 2-20X performance improvement over emulator performance, because virtual platforms use very fast virtual CPU models. Further, the virtual platform debugger provides a familiar environment for software engineers. And save and restore is available as well.
Making the Choice
So what to use when? Here's a quick summary of a chart Starr showed during the presentation:
Embedded Target Emulation
WHY: Enables save/restore, easily re-locatableUSE WHEN: Getting deep into workloads is important
Virtual Platform Co-Emulation
WHY: Highest performanceUSE WHEN: Need to run large software workloads
In conclusion, Starr noted that in-circuit emulation still provides a "huge value" and is especially important for real-world traffic conditions. The embedded target emulation is becoming more popular because of save/restore, and it allows engineers to get very deep into software workloads. Virtual platform co-emulation is great for software development when CPU validation is a lower priority.
"In the future, we definitely have some challenges," Starr said. "Debugging is becoming a big challenge, especially now with software teams getting on the systems. They want to see their debuggers and they want to see their view of the world. The hardware designers want to see the details and the waveforms. How do we synchronize these things?"
To listen to the audio presentation and view the slides, click here and look for the Monday 12:30 pm presentation.