Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
It turns out that Cadence is not the only EDA-related organization that is celebrating its 25th anniversary this year. The Silicon Integration Initiative (Si2), a leading EDA standards organization, also got its start in 1988 - under the name CAD Framework Initiative. At the 18th Si2 Conference Oct. 8, 2013, speakers provided updates about Si2 standards in a number of areas, including Si2's move into SPICE modeling through its 2013 acquisition of the Compact Model Council (CMC).
At the conference Steve Schulz (left), Si2 president, provided a look at "where we've been" and "where we're going" with EDA standards efforts. Keith Green, chair of what Si2 now calls the Compact Model Coalition, gave a keynote speech about the 17-year history of the CMC and its potential "synergies" with other Si2 standards. Sessions updated Si2 initiatives in such areas as process development kits (PDKs), design for manufacturability (DFM), low-power design, OpenAccess, and the new effort in SPICE modeling. Cadence was the event sponsor for the conference.
The Compact Model Council came to Si2 because its parent organization, TechAmerica, decided to get out of the standards business. The CMC didn't receive a lot of attention during its 17-year history, but the standardization of SPICE models is of vital importance for the semiconductor industry. As Schulz wrote in his Collaborative Advantage blog, "our entire industry, be it digital, analog, RF, or photonic, spanning every market segment, is built up from a foundation of SPICE-class transistor models."
25 Years - From There to Here
At the conference, Schulz talked about the formation of the CAD Framework Initiative, which was chartered to find standardized ways to manage EDA databases. He traced the "long and winding road" through the 1990s and 2000s, up to the present time where Si2 has five major coalitions - DFM Coalition, Low-Power Coalition, Open PDK Coalition, OpenAccess Coalition, and now the Compact Model Coalition. Additionally, two technical advisory boards (TABs) are looking towards the future - the 3D TAB and the Silicon Photonics TAB.
Schulz also talked about the creation of "standards value." One key point is that standards efforts must consider all pieces of design flows as they exist today. "Solving the whole problem is harder, but that is the approach we've taken at Si2," he said. Another important point is that standards must be followed up with documentation, training, utilities, and other collateral. Finally, "if it was worth the effort to create it, it's worth the effort to drive the adoption."
Keynote speaker Keith Green (right) is a distinguished member of the technical staff in the Analog Technology Development at Texas Instruments. 17 years ago, he noted, the Compact Model Council started with a mission "to standardize SPICE models for all major technologies so customer communication and efficiency can be enhanced." Rather than create models on its own, the CMC relied on universities to do the SPICE model R&D.
The list of CMC standard model types is impressive. It includes the following:
Many of these models are delivered in Verilog-A, which Green called "a real game changer for the CMC and for SPICE model standardization. Models used to be delivered in C code, which makes it difficult to evaluate a model. Verilog-A has been a real enabler for us."
Looking for Synergies
Green discussed ways in which the Compact Model Coalition can potentially work with other Si2 coalitions. With Open PDK, he said, "there clearly has got to be a connection with SPICE models." He also noted that the CMC has done some work on a standard netlist language as well as a reliability modeling API.
The Low Power Coalition (LPC) opens a number of possibilities for synergy. "I read through some of the presentations on the LPC and thought, this looks like something that someone from CMC could have written," Green said. "We have already been engaged with this. You can't talk about low-power simulation without modeling leakage correctly within the transistors." Power modeling was a big part of the CMC's recent work with FinFET (BSIM-CMG), BSIM6, and ET-SOI (thin body SOI) modeling.
The DFM Coalition, Green said, already recognizes the need for SPICE modeling in manufacturability simulation. In 2007 the CMC tried to get into DFM on its own by developing a standard for statistical modeling. It didn't work out. "Maybe we weren't properly plugged into the rest of the EDA community," Green said. "We were an isolated group of modeling people trying to solve something. And I think that's one of the areas we're going to improve upon by becoming part of Si2."
Green said there are also synergies with Si2's two new emerging technology TABs. One question to explore with the 3D TAB, for example, is whether through-silicon vias (TSVs) need standard SPICE models. As for the Silicon Photonics TAB, "maybe in our future we will have some standard silicon photonics models." Reliability modeling will be very crucial for photonics, he noted.
As Schulz noted, the CMC acquisition expands Si2 in both size and scope. I would say that work underway at Si2, including its new role in SPICE model standardization, bodes well for another 25 years of successful standards development.
Related Blog Post - 2012 Si2 Conference
Si2: Jim Hogan Predicts "Custom 2.0" IC Design Retooling