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How much verification time and effort could you save, if you could write one reusable test stimulus specification and deploy it across multiple hardware/software development platforms? The Accellera standards organization is trying to make this scenario a reality with its newly constituted Portable Stimulus Specification Working Group.
Today there is no single, standard way to specify stimulus that is reusable across target platforms (simulation, emulation, silicon) and across different levels of SoC development (IP block to full system with software). A portable stimulus specification would allow these kinds of reuse, greatly boosting verification productivity and saving valuable time. Further, the specification would make it possible to port stimulus across tools from different vendors.
Accellera announced the formation of the Portable Stimulus Specification Working Group on February 11, 2015. The working group formation followed a proposed working group activity that was open to industry input from May through December 2014. A total of 37 individuals from 20 companies participated in the proposed working group, including semiconductor suppliers, systems houses, EDA vendors, and semiconductor IP providers.
Cadence is participating in the new working group. According to Larry Melling, product marketing manager at Cadence and a member of the working group, the proposed specification standard is “heavily customer driven” and is an important standard from a user perspective.
“They’re looking for a way to define test cases that are portable, so they can reuse test cases as they move across execution platforms from virtual prototypes all the way to post silicon,” Melling said. “They are also looking to reuse the tests vertically, from the IP stage all the way up to the system level. These requirements are well aligned with our Perspec System Verifier product, which automates use-case verification.”
The following diagram shows how a portable stimulus specification would provide a common model for different classes of users, verification environments, and platforms, with a scope that extends from IP blocks to systems and software.
Proposed Portable Stimulus specification (Source: Accellera)
The new standards activity comes at a turning point in IC functional verification. SoC complexity is skyrocketing, and verification involves many IP blocks, multiple processor cores, and lots and lots of software that must run optimally on the SoC. In advanced process nodes, designs with 100M instances are not uncommon. Despite many advances, verification still consumes the lion’s share of the front-end design process.
In recent years, technologies such as hardware verification languages, coverage metrics, reusable verification IP, verification planning, and the Universal Verification Methodology (UVM) have made verification much more productive, but these gains are primarily at the IP block level and are focused on hardware RTL simulation. At the system level, people really want to verify use cases that describe a given functionality that the SoC and its software must perform. In a recent blog post about the Cadence Perspec System Verifier, I gave the following example of a use case:
Device must be able to take a video buffer and convert it to MPEG4 format with medium resolution via any available graphics processor. Transmit the result through the modem via any available communications processor, and in parallel decode it using any available graphics processor. Display the video stream on any of the SoC displays supporting the resulting resolution.
Software-driven verification—an emerging technology in which embedded software exercises the SoC design—is increasingly used to verify use cases. However, embedded software does not support the kind of metric-driven verification you get with a language like e or SystemVerilog. The Portable Stimulus Working Group requirements for the standard include enabling both portable stimulus and checking.
Further, there is no standard way to describe use cases and generate reusable tests that can be used across multiple verification platforms. And that’s the gap that the proposed portable stimulus specification can potentially fill. In so doing, it will help bring verification up to the system and software level, and support the full range of hardware/software development platforms.
Melling noted that use-case verification can go beyond functionality and look at timing and power as well. “Portable stimulus is about how you define use cases such that you not only describe what needs to be done, but you can check to see that it meets power and performance and check out what coverage you’ve achieved,” he said.
Accellera has appointed Faris Khundakjie, senior verification engineer at Intel, as chair of the Portable Stimulus Working Group. The group will have a kick-off meeting March 5, 2015, to establish a mission statement, goals, milestones, and roadmap, and will develop a design objective document based on the requirements provided by the proposed working group. For more information and to learn how to participate, see the Accellera website.
- Q&A: Moving Towards Use Case and Software-Driven Verification
- New Perspec System Verifier—Will Use-Case Testing Redefine SoC Verification?