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By Steve Leibson for Denali Software
Today, NAND Flash is king of the semiconductor memories in terms of cost per bit, a position it has held since 2004 or 2005. Consequently, NAND Flash serves as the technology driver for semiconductor processing--a position previously held by DRAM, processors, and FPGAs. The top NAND Flash semiconductor vendors are currently fabricating NAND Flash memories using 3x nm lithography (34nm for Intel and Micron, 30 nm for Samsung). By some technology estimates, there are now only two generations left in the life of NAND Flash as we know it today. At the current pace of NAND Flash generational development, two generations equals 36 months. After that, NAND Flash device capacity will clearly stall unless some new development changes the fundamental design of the NAND Flash semiconductor memory cell. That's not just alarmist talk for the purpose of controversy. One of the people making such claims is Micron's Dean Klein, Vice President of Memory System Development, who delivered these warnings in a keynote at Storage Visions 2010 held earlier this month in Las Vegas, just before CES.
The Incredible Shrinking NAND Flash Memory Cell
(From the keynote presentation by Micron’s Dean Klein)
Some of the looming NAND Flash problems involve the inability of smaller-geometry Flash memory cells to safely handle the high programming voltage (25V) needed to induce electron tunneling, memory-cell crosstalk, parametric degradation of dielectrics at shrinking geometries (layers are now just a few atoms thick), and the fact that NAND Flash cells are already so small that the presence or absence of fewer than 200 electrons on the floating gate makes the difference between a digital zero and a one. Because of these growing problems, said Klein in his keynote, it will be very difficult to employ semiconductor process geometries smaller than 20nm for existing NAND Flash memory cell design. Klein then took one step back from the brink by noting that people previously said NAND Flash could not break through the 40nm barrier but obviously it did.
Semiconductor process and design wizards found ways to overcome those limits and those same wizards are searching for ways to overcome the present problems, but there is not yet enough visible progress to believe that a solution is imminent said Klein. One possible path to a solution is to employ 3D or vertical NAND Flash cell stacking, which would double chip capacity without shrinking the memory cell size. If successful, 3D stacking could add another two NAND Flash generations and postpone the need for a NAND Flash replacement technology for five to eight years according to Klein. NAND Flash vendors will use 3D stacking if it proves sufficiently practical, but only if it's practical.
In the end, semiconductor vendors always take the path of least resistance, said Klein, and there are candidate technologies that promise non-volatile alternatives to NAND Flash. Klein listed MRAM (magnetic RAM), FRAM (ferroelectric RAM), PCM (phase-change memory), resistive RAM, and crosspoint memory as candidate replacement memory technologies. Again taking a step back, Klein then stated that all of these replacement memory technology candidates currently have warts but his personal pick for the eventual winner is PCM.
Micron isn't the only semiconductor vendor staring down the loaded barrel of the NAND Flash scaling problem. In a one-on-one interview just prior to Klein's keynote, Samsung's Flash Marketing Director Tony Kim said much the same thing. Going to smaller NAND Flash geometries is becoming very difficult said Kim. Vendors are investigating different materials and designs for the NAND Flash memory cell’s floating gate, different cell architectures, 3D stacking, and multi-level cells (storing more than one bit per physical memory cell). However semiconductor technologists can see that time is growing short, there is an end to the technology, and so they're all seeking a high-volume semiconductor technology that will overthrow the current king of non-volatile memory, NAND Flash.