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After a long day, I like to browse around the web, looking for interesting stories. Ok, yes, I’m a geek (as my daughter continues to remind me, accompanied by a roll of her eyes).
But I found this story about the new MacBook too interesting to pass up. I agree with Seth that the most interesting feature is the use of multiple graphics. But for a different reason – this is the ultimate in coarse Power Shut Off.
What I find particularly interesting is that I bet each of these graphics sub-systems also have some pretty advanced power management capabilities. But by themselves, it wasn’t enough for Apple. For Apple, the additional cost of a graphics system was worth the extra 25% of battery life. And, of course, cost here is not just the chip price. There’s also the additional real estate, the software development and qualification costs, and the potential reliability impact of having additional components.
So I’m wondering if this can explain why I’m not seeing that many DVFS (Dynamic Voltage Frequency Scaling) or AVS (Adaptive Voltage Scaling) designs being done. A quick refresher – AVS is changing the voltage based on the application requirements. Higher horsepower requirements will cause the voltage to be increased. DVFS is taking that one step further, and changing the voltage and frequency based on sub-application needs. The I-frame decoding takes more oomph than the P-frame, so amp up the voltage and frequency during I-frame.
But voltage scaling takes some sophisticated software and hardware control. Maybe it is cheaper to just put extra stuff on the chip (or in the case of Apple, on the motherboard) and switch between them based on the user requirements? I’ve also heard of this approach being used by some networking companies – they’ll just turn off some of the switch circuits if they’re not needed.
What do you think? Are multiple potentially redundant power shut off blocks the way to go? Are we going to see more layered PSO like the Apple approach? And what does this mean for power design and estimation?