Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Building ASICs is a pretty much standard process - you may define your specification based on whatever constraints you have, pick your IPs if any, do a guess-timate of your entire chip so you can figure out the budget, then commit - plunk down the cash and commit resources so you can really do the work to get silicon out the door.
What hasn't been standard is the way people have approached doing something like the above. Specifically, beginning with the specification, every company project group may have their own way of manually, semi-automating, or almost-fully-automating the above process so that things can get done faster and more accurately in order to meet their schedule needs and utlimately the market window for their product.
A key recipe ingredient that many companies have shared with me is the importance of ensuring the IP portion of the ASIC ecosystem is strong. This includes:
A wise man (Camille from IDT) once told me - IPs and the strategy around them are integral to building successful ASICs. Lots of companies now base their designs on some IP. In fact, he even wrote a paper related to this IP stuff that was published late last year to back up his passion which he shared with me.
So comes the next question: how do I create such an infrastructure to create this beautiful ecosystem / playground where I can build and prototype ASICs earlier with higher ease?
One answer is to in part turn to tool automation. Check out ChipEstimate.com for more details. This large ecosystem of IP as well as their tool leverages the 200+ IP vendors and foundry relationships, providing thousands of popular IPs, probably at least some you are already using. The tool cockpit also allows you to define your own internal IPs easily, pretty cool stuff.
ChipEstimate.com in fact has been so well received by customers in the last year that it just won 2009 DesignVision Award from the International Engineering Consortium (IEC).
Here's a short clip of the ChipEstimate guys collecting their award and Adam's (aka as 'the young boss') speech:
If you're looking to improve your ASIC decision-making process up front, definite check out this stuff to at least get ideas for your next project since it is very useful and practical.