Logic Design Blogs

With more and more designs employing low power design techniques, the need to accurately verify these low power structures is critical.  Unfortunately, the complexity associated with low power design often increases the complexity of low power verification.

The good news is that the Incisive Unified Simulator has automated the low power verification process.  Without need for custom PLI development, complex TCL scripts, complicated library development, or RTL customization, many low power design constructs can be seamlessly verified in the Incisive environment.

The following demo will illustrate the verification of a design that employs power shut-off.  The demo will highlight:

• Specification of low power design intent using the Common Power Format (CPF)
• Simulation of the PSO operation in Incisive
• The graphical debugging environment in SimVision

As an FYI, the video below is best viewed by expanding it to full screen.  That can be done by clicking on the icon with the arrows pointing to each corner in the lower right hand side of the video.