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There has been a lot of talk recently about improving synthesis predictability by passing forward "guides" to physical design. This was something that we investigated doing in RTL Compiler, too. That was 2003. So whenever I get asked by folks if we would consider a similar approach in RTL Compiler Physical, I can safely say that we already have and we found that they do not predict with enough accuracy on a consistent basis.
Given all we've learned here at Cadence over the years, I can't help but think of the guide approach as being similar the Seinfeld episode where Kramer has a similar phone number as the "movie phone" line (remember that service?), and he decides to just try to help the people who incorrectly dial his number:
Ah, using touch-tones to enter the first three letters of the name of the movie. This approach will improve things when the problem is not difficult (when there is not more than one movie that begin with the same first three letters.....what about when they begin with "the"). And of course it requires the same back-end that can interpret those touch tones....poor Kramer didn't know what to do with them! If he were operating his "movie phone" the weekend Avatar opened, he could guess correctly most of the time. But what about more difficult problems? That's where this approach breaks down.
"Why don't you just tell me where to place the cells?"
We have found that the difficult designs - high utilization, high congestion, even designs with a lot of timing-critical logic - require accurate physical representation during synthesis, and also require a better handoff mechanism. And as a synthesis user, wouldn't you rather be assured that what you see before you hand off is exactly what your physical design teams sees?
This is why RC-Physical passes forward seed placement. It's doing placement under-the-hood anyway, you can see it in the GUI. This is necessary in order to account for blockages, buffering, congestion, etc. These are the physical issues that cause the most problems. So why not pass that to the physical design team, so they will see the same representation of the design that the logic designers signed off on? No matter what physical implementation system they use! From there the physical designers can incrementally optimize to account for global routing for that floorplan and move forward to clock tree synthesis.
More and more we see synthesis and physical implementation as a collaboration, not an artificially-divided assembly line. If Moviefone can adapt to utilize modern technology to deliver more efficiency and a better user experience, why can't EDA?