Logic Design Blogs

TLM | RTL | Logic Design | rtl compiler | C-to-Silicon | Synthesis

Apple | IP | Jack Erickson | Imagination | Logic Design | system design | software | iPad | ARM

TLM | timing constraints | Logic Design | rtl compiler | C-to-Silicon | Synthesis | Physical Synthesis

4G | methodology | Santa Claus | EDA | Logic Design | metrics

ECO | ASIC | Low Power | 2009 reflections | logic design | C-to-Silicon

runtime | RTL Compiler 9.1 | leakage power | synthesis methodology logic design conformal lec aborts | multi-vt | OPCG | Logic Design | QoS | clock gating

Apple | Jack Erickson | innovation | logic design | iPod

Jack Erickson | Logic Design | rtl compiler | Design Explorer | MSMV | Multi-Supply Multi-Voltage

Physical timing closure | Jack Erickson | RC-Physical | Physical Prediction | Logic Design | rtl compiler | Physical Synthesis | ple physical global

ECO | conformal | RTL | Logic Design

chipestimate | Jack Erickson | logic design | spreadsheet | chip planning | chip estimate

Jack Erickson | Logic Design | Twitter

Jack Erickson | logic design | EDA Graffiti | John Bruggeman | rock stars

RC-Physical | Logic Design | rtl compiler | PLE | RC-Spatial | Physical Synthesis

friday fun | The Next Generation | Logic Design | Conformal ECO

RTL power estimation | Jack Erickson | Logic Design | rtl compiler | low power design

ECO | C-ECO | friday fun | The Next Generation | Logic Design | caveman | Conformal ECO

Static timing analysis | friday fun | The Next Generation | Logic Design

logic | friday fun | Conformal Low Power | Incisive | The Next Generation | design | low power design

friday fun | MSV | adult | The Next Generation | Logic Design | assertions | low power design | Power Shut-Off

Ankush Sood | RTL Compiler 9.1 | RC-Physical | congestion | Logic Design | Synthesis

DAC | ASIC | IP | Logic Design

friday fun | EDA | Logic Design

conformal | DFT | Low Power | SDC constraints | cadence | Jack Marshall | Logic Design | rtl compiler

Spatial | RTL Compiler 9.1 | Jeff Flieder | Physical Prediction | Logic Design | PLE