<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>AI Unleashes Chip Designer Productivity</title><link>/cadence_blogs_8/b/life-at-cadence/posts/ai-unleashes-chip-designer-productivity</link><description>EDA has a history of enabling breakthrough designer productivity. AI in EDA isn’t just making things better. Last year, we launched the biggest, baddest AI in EDA technology called the Cadence&amp;#174;︎ Cerebrus™︎ Intelligent Chip Explorer. It’s a revolutionary</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>